Reducing crosstalk in PCB routing

Crosstalk on a PCB is coupling between adjacent traces through mutual capacitance (I = C·dV/dt) and mutual inductance (V = M·dI/dt). It grows with fast edges, small spacing, long parallel length and height above the ground plane. The routing guidelines to reduce it are:

1. Increase spacing: follow the 3W rule: keep centre-to-centre distance of at least three trace widths (edge spacing about 2W). This reduces coupling by about 70 percent; 10W gives about 98 percent.
2. Shorten parallel runs: avoid long parallel routing of aggressor and victim; route the clock and other fast signals separately.
3. Use orthogonal routing on adjacent layers (horizontal on one, vertical on the next) so coupled length is minimal.
4. Use a solid ground plane close to the signal layer; small height h reduces the fields spread between traces and keeps the return current under the trace.
5. Guard traces: place a grounded trace between sensitive lines, connected to ground with vias at both ends and at intervals (stitching, each less than λ/10).
6. Reduce edge rate: use the slowest logic family that satisfies timing; add small series resistors at the source.
7. Separate groups: keep clock, high-speed, analog, power and sensitive lines in separate regions; keep the victim lines short and low-impedance.
8. Differential pairs: route tightly coupled and balanced, so that the noise appears as common-mode.
9. Terminate lines to avoid reflections that add to crosstalk.
10. Avoid stubs and use the shortest path; do not route near board edges or connectors in parallel.