Short note: Phase locked loop

A phase-locked loop (PLL) is a closed-loop feedback circuit that locks the frequency and phase of a voltage-controlled oscillator to those of an input signal.

 vin ->[Phase det]->[Loop filter]->[Amp]--+--> vc (FM out)
           ^                              |
           +------------[ VCO ]<----------+
                       vo (locked output)

Components and working:

1. Phase detector compares the input with the VCO output and gives an error voltage proportional to their phase difference.
2. Loop filter (LPF) removes the high-frequency terms and sets the loop response.
3. VCO changes its frequency according to the control voltage, $f_o=f_{free}+K_vv_c$, and is pulled toward the input frequency.

When the loop is locked, the VCO frequency equals the input frequency, with a small constant phase difference. If the input frequency changes, the error voltage changes and the VCO follows it.

Key terms:

• Free-running frequency: the VCO frequency with no input.
• Capture range: the range of input frequencies over which the loop can acquire lock.
• Lock (tracking) range: the range over which the loop stays locked once it has locked; it is wider than the capture range.

Applications: FM demodulation (the control voltage is the message), carrier recovery for coherent detection (locking to the carrier or pilot in AM/SSB, or a Costas loop for DSB-SC), frequency synthesizers, frequency multiplication/division, clock recovery in digital receivers, and FSK demodulation. IC example: NE565.