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Addressing modes of 8051

Short answer

The 8051 uses five data addressing modes: immediate (#data), register (R0-R7, A), direct (RAM/SFR address), register indirect (@R0/@R1, @DPTR for MOVX), and indexed (MOVC with A+DPTR or A+PC). It also supports bit addressing on bit-addressable RAM and SFRs.

Explain the addressing modes used in 8051 microcontroller (with example).

The addressing mode tells the CPU where the operand of an instruction is. The 8051 has five addressing modes for data, plus bit addressing.

ModeOperand isExampleMeaning
Immediatea constant in the instruction, marked with #MOV A,#25HA = 25H
Registerin a register R0-R7 of the active bank (or A, B)MOV A,R3A = R3
Directat an 8-bit internal RAM or SFR addressMOV A,30H; MOV P1,AA = RAM[30H]; P1 = A
Register indirectat the RAM address held in R0 or R1MOV A,@R0A = RAM[R0]
Indexedin code memory at base + offsetMOVC A,@A+DPTRA = ROM[DPTR + A]

Details

  1. Immediate: the data is part of the instruction, e.g. MOV R2,#10 and MOV DPTR,#4000H (16-bit). Used to load constants.
  2. Register: short and fast (one byte). ADD A,R5 adds R5 to A. The bank is chosen by bits RS1:RS0 in the PSW.
  3. Direct: the address is in the instruction, e.g. MOV 40H,#5 or MOV A,P1 (P1 is the SFR at 90H). This is the only way to reach the SFRs.
  4. Register indirect: the register works as a pointer; with INC R0 the same code walks through an array. External RAM uses MOVX A,@DPTR or MOVX A,@R0. Only R0 and R1 (and DPTR for MOVX) can be pointers.
  5. Indexed: used for look-up tables in ROM: MOVC A,@A+DPTR or MOVC A,@A+PC; also JMP @A+DPTR.
  6. Bit addressing: SETB P1.0, CLR C and JB P2.1,LABEL operate on single bits of the bit-addressable RAM (20H-2FH) and SFRs.

Example (look-up table):

        MOV DPTR,#TABLE
        MOV A,#3
        MOVC A,@A+DPTR   ; A = 9 (4th table entry, index 3)
HERE:   SJMP HERE        ; stop, so the table is not executed as code
TABLE:  DB 0,1,4,9,16

✓ Answer checked by Claude Opus 5.5 (high effort)

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