Factorial single-purpose processor

Assumption: input n is an 8-bit unsigned integer; with a 16-bit result register the output is valid for 0 <= n <= 8 (8! = 40320). Use a wider output register for larger n.

Step 1: Function

 Factorial(n):
   F = 1; I = 2
   while (I <= n):
       F = F * I
       I = I + 1
   output F

Step 2: State diagram (FSMD)

 S0 --start=1 (N=n, F=1, I=2)--> S1 (test)
 S0 --start=0--> S0
 S1 --I<=N--> S2 (F=F*I, I=I+1) --> S1
 S1 --I>N---> S3 (out=F, done=1) --> S0

Step 3: Datapath

  n -> [N] ------------> [ I <= N ] --> le (to controller)
                              ^
  [I] <- mux(2, I+1) ---------+
  [F] <- mux(1, F*I) <- [ x ] <- F, I
  F --> out

Components: registers N, I, F; a multiplier; an incrementer; a comparator (I <= N); two 2:1 muxes. Control signals: N_ld, I_sel, I_ld, F_sel, F_ld, out_en. Status: le.

Controller

4-state FSM (2-bit state register). Block diagram:

 start, status flags --> +-------------+   +-----------+
 (from datapath)         | Next-state  |-->| State     |
                         | logic       |   | register  |
                         +------^------+   +-----+-----+
                                |   current state |
                                +-----------------+
                                                  v
                                           +-------------+
                                           | Output logic|--> control
                                           +-------------+    signals

Trace n = 4: F = 1; I = 2 -> F = 2; I = 3 -> F = 6; I = 4 -> F = 24; I = 5 > 4 -> output 24. (n = 0 or 1 outputs 1.)