Excess-3 code and binary-to-Excess-3 converter

Excess-3 code

Excess-3 (XS-3) is an unweighted BCD-type code in which each decimal digit is represented by the 4-bit binary of (digit + 3). For example, 5 → 5 + 3 = 8 → 1000, and $(27)_{10} = 0101\ 1010$. It is self-complementing: the 9's complement of a digit is obtained by inverting its bits (e.g. 2 = 0101, 7 = 1010), which makes decimal subtraction easy.

Binary (BCD) to excess-3 converter

Assumption: input is a 4-bit binary number ABCD (A = MSB) with values 0–9; inputs 10–15 never occur and are taken as don't cares. Outputs are WXYZ = input + 3.

Truth table

Output functions

• $W = \Sigma m(5,6,7,8,9) + d(10\text{–}15)$
• $X = \Sigma m(1,2,3,4,9) + d(10\text{–}15)$
• $Y = \Sigma m(0,3,4,7,8) + d(10\text{–}15)$
• $Z = \Sigma m(0,2,4,6,8) + d(10\text{–}15)$

K-map for W (rows AB, columns CD in order 00, 01, 11, 10):

        CD=00 01  11  10
AB=00     0   0   0   0
AB=01     0   1   1   1
AB=11     x   x   x   x
AB=10     1   1   x   x

Groups: A (bottom two rows, octet), BD and BC (quads) → $W = A + BC + BD$.

Simplifying the other maps the same way:

$$\begin{aligned} W &= A + BC + BD = A + B(C + D) \\ X &= B'C + B'D + BC'D' = B'(C+D) + B(C+D)' \\ Y &= CD + C'D' = (C \oplus D)' \\ Z &= D' \end{aligned}$$

Logic diagram (basic gates)

 C --+--[OR]-- (C+D) --+---[AND]-- B(C+D) --+
 D --+                 |     B --+          |--[OR]-- W
                       |                    |
                       |      A ------------+
                       |
          (C+D) --[AND]-- B'(C+D) --+
             B' --+                 |--[OR]-- X
          (C+D)'--[AND]-- B(C+D)' --+
              B --+
 C --[AND]-- CD ---+
 D --+             |--[OR]-- Y
 C'--[AND]-- C'D'--+
 D'--+
 D --[NOT]---------------- Z

The circuit uses NOT gates for B', C', D' and (C+D)', plus AND and OR gates as shown. Check: for input 0110 (6), W = 0 + 1·1 = 1, X = 0, Y = 0, Z = 1 → 1001 = 9 = 6 + 3.