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3-bit even parity generator and 4-bit checker

Short answer

A 3-bit even parity generator computes P = A ⊕ B ⊕ C using two XOR gates. A 4-bit even parity checker produces PEC = A ⊕ B ⊕ C ⊕ P with three XOR gates; PEC=0 indicates no error.

Design a 3-bit even parity generator and 4-bit even parity checker circuit.

Parity is used to detect single-bit errors. With even parity, the transmitted word (data + parity bit) always has an even number of 1s.

3-bit even parity generator

Inputs A,B,CA, B, C; output PP makes the total number of 1s even.

ABCP
0000
0011
0101
0110
1001
1010
1100
1111
P=Σm(1,2,4,7)=A′B′C+A′BC′+AB′C′+ABC=A′(B⊕C)+A(B⊙C)=A⊕B⊕C\begin{aligned} P &= \Sigma m(1,2,4,7) = A'B'C + A'BC' + AB'C' + ABC \\ &= A'(B \oplus C) + A(B \odot C) = A \oplus B \oplus C \end{aligned}
 A --+
     +--[XOR]--+
 B --+         +--[XOR]--- P
 C ------------+

4-bit even parity checker

The receiver gets A,B,C,PA, B, C, P and produces the parity error check PECPEC: 0 if the count of 1s is even (no error), 1 if odd (error).

A B C PNo. of 1sPEC
000000
000111
001120
011131
111140
(other rows follow the same rule)

PEC=1PEC = 1 for minterms 1, 2, 4, 7, 8, 11, 13, 14 (odd number of 1s). The K-map is a checkerboard, so

PEC=A⊕B⊕C⊕P=(A⊕B)⊕(C⊕P)PEC = A \oplus B \oplus C \oplus P = (A \oplus B) \oplus (C \oplus P)
 A --+
     +--[XOR]--+
 B --+         |
               +--[XOR]--- PEC
 C --+         |
     +--[XOR]--+
 P --+

Example

Data 110110: generator gives P=1⊕1⊕0=0P = 1 \oplus 1 \oplus 0 = 0; sent word 11001100. If received correctly, PEC=1⊕1⊕0⊕0=0PEC = 1 \oplus 1 \oplus 0 \oplus 0 = 0 (no error). If bit C flips (received 11101110), PEC=1PEC = 1, so an error is flagged.

✓ Answer checked by Claude Opus 5.5 (high effort)

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