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Common collector amplifier Ri, Ro and gain
Short answer
Input resistance: Rin = R1∥R2∥(β+1)(re+RE∥RL), high. Voltage gain: Av = (RE∥RL)/(re+RE∥RL) ≈ 1. Output resistance: Rout = RE∥[re + (Rs∥R1∥R2)/(β+1)], low. The stage is a buffer.
Derive the expression for input resistance, output resistance, voltage gain of a voltage divider bias common collector amplifier.
Circuit and ac equivalent
Common collector (emitter follower) with voltage divider bias: input at the base through C1, output from the emitter through C2 to RL, collector at ac ground (VCC).
Vs--Rs--||--+--------B--\
R1||R2 |> (ib) re model
E--+--||--RL
RE
---
At ac, the supply is ground: R1, R2 go from the base to ground; RE and RL (from the emitter) are in parallel. Let R'E = RE || RL and RB = R1 || R2. Use the T-model: emitter current ie = (β+1) ib, emitter resistance re = VT/IE.
Input resistance
Looking into the base: vb = ie (re + R'E) = (β+1) ib (re + R'E), so
Rib = vb/ib = (β+1)(re + R'E) ≈ β (re + R'E)
Rin = RB || Rib = R1 || R2 || (β+1)(re + RE||RL)
This is large because the small emitter resistance is multiplied by (β+1).
Voltage gain
vo = ie R'E , vi = ie (re + R'E)
Av = vo/vi = R'E / (re + R'E) ≈ 1 (since R'E ≫ re)
With a source of resistance Rs: Avs = Av · Rin/(Rin + Rs). The gain is positive (no phase shift), slightly less than 1.
Output resistance
Set vs = 0 and look back from the emitter (RL removed). The base sees Rs || R1 || R2 = R's, so
Rout = RE || [ re + R's/(β+1) ] ≈ re + R's/(β+1)
It is small: tens of ohms for typical values.
Current gain
Ai = io/ii = Av · Rin/RL ≈ (β+1) · RB/(RB + Rib) · RE/(RE + RL)
Summary
| Parameter | Result |
|---|---|
| Rin | R1 ‖ R2 ‖ (β+1)(re + R'E) (high) |
| Rout | RE ‖ [re + R's/(β+1)] (low) |
| Av | R'E/(re + R'E) ≈ 1 |
| Phase | 0° (in phase) |
Hence the stage is a buffer: high input and low output resistance with unity voltage gain.
✓ Answer checked by Claude Opus 5.5 (high effort)
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