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SCR two-transistor model and V-I curve

Short answer

An SCR is a four-layer PNPN device modeled as inter-connected PNP and NPN transistors with positive feedback. When α1+α2 approaches 1, the device latches ON; gate current lowers forward breakover voltage. It stays ON until anode current falls below holding current IH; the V-I characteristic shows forward blocking, breakover, and low-voltage on-state.

Explain the working principle of Silicon Controlled Rectifier (SCR, thyristor) utilizing two transistor models along with its VI characteristic curve (for differing gate current values).

A Silicon Controlled Rectifier (SCR) is a four-layer PNPN, three-terminal (anode A, cathode K, gate G) unidirectional switch. It stays OFF in the forward direction until a gate pulse (or breakover voltage) turns it ON, and then it stays ON (latches) until the anode current falls below the holding current.

Structure and two-transistor model

The PNPN structure is split into a PNP transistor Q1 (P1-N1-P2) and an NPN transistor Q2 (N1-P2-N2) sharing the middle layers.

   A                       A
   |                       |
  [P1]                    Q1 (PNP)  emitter at A
  [N1] ---+               |  \
  [P2]    | split  ==>    |   +--- B1 = C2
  [N2]    |               |  /
   |      |          C1 = B2 --+--- G
   K                          Q2 (NPN)
                              |
                              K   (Q2 emitter)

Collector of Q1 drives the base of Q2, and collector of Q2 drives the base of Q1, forming a positive feedback (regenerative) loop.

Mathematical expression

For each transistor, IC = α·IE + ICBO.

IC1 = α1·IA + ICBO1
IC2 = α2·IK + ICBO2
IK  = IA + IG
IA  = IC1 + IC2   (KCL at the N1-P2 region)

IA = α1·IA + ICBO1 + α2(IA + IG) + ICBO2

IA = (α2·IG + ICBO1 + ICBO2) / (1 − (α1 + α2))

Working

  • Forward blocking: with small IG, α1 and α2 are small, α1 + α2 << 1, and IA is a tiny leakage current. J2 is reverse biased and blocks the voltage.
  • Turn-on: a gate current increases IK and so α2. As current grows, α1 and α2 rise. When α1 + α2 → 1, the denominator approaches zero and IA rises sharply, limited only by the external load. Both transistors saturate and the device latches ON.
  • After turn-on, the gate loses control; the SCR stays ON as long as IA > holding current IH.
  • Reverse blocking: with cathode positive, J1 and J3 are reverse biased; only a small leakage flows until reverse breakdown.

V-I characteristic

          IA
           ^       IG2>IG1>IG0=0
           |      |  on-state
           |      |
       IL -|..../ |
       IH -|.../  |
           |   \  \    \
           |    \  \    \  forward
-VBR       |     IG2 IG1 IG0  blocking
 ----+-----+--------------------> VAK
     |     |   VBO2  VBO1  VBO0
     |reverse
     |blocking
  • Reverse blocking region: small leakage until reverse breakdown VBR.
  • Forward blocking region: small leakage until forward breakover voltage VBO.
  • Forward conduction region: after breakover, voltage drops to about 1–2 V and current is set by the load.
  • Effect of gate current: larger IG lowers the breakover voltage (IG2 > IG1 > IG0 gives VBO2 < VBO1 < VBO0). With large enough IG, the SCR behaves almost like a diode.
  • Latching current IL: minimum anode current needed just after triggering to keep it ON. Holding current IH (< IL): minimum current to stay ON.

✓ Answer checked by Claude Opus 5.5 (high effort)

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