3 op-amp IA output and common-mode rejection

The three op-amp instrumentation amplifier has two buffer op-amps (A1, A2) forming an input gain stage, followed by a difference amplifier (A3).

Circuit

 V1 --->(+)\
           A1>---+--Vo1--[R2]--+--[R3]--+
       +->(-)/   |             |        |
       |         R1          (-)\       |
       +---------+              A3>-----+--> Vo
       RG                    (+)/
       +---------+             |
       +->(-)\   R1   Vo2--[R2]+--[R3]--GND
       |   A2>---+--Vo2
 V2 --->(+)/

Expression for output voltage

Input stage. By the virtual short, the two ends of RG are at V1 and V2. The current through RG is:

I = (V1 − V2)/RG

No current enters the op-amp inputs, so the same I flows through both R1 resistors:

Vo1 = V1 + I·R1 = V1 + (R1/RG)(V1 − V2)
Vo2 = V2 − I·R1 = V2 − (R1/RG)(V1 − V2)

Vo2 − Vo1 = (V2 − V1)(1 + 2R1/RG)

Difference stage (A3). By superposition:

V+ = Vo2 · R3/(R2 + R3)
Vo = (1 + R3/R2)·V+ − (R3/R2)·Vo1
   = (R3/R2)(Vo2 − Vo1)

Result:

Vo = (R3/R2)(1 + 2R1/RG)(V2 − V1)

How it rejects common-mode signal

Let V1 = V2 = Vcm (pure common-mode input):

1. The voltage across RG is zero, so I = 0 and no current flows in R1.
2. So Vo1 = Vcm and Vo2 = Vcm. The first stage passes the common-mode signal with gain 1 only, while the differential signal gets a gain of (1 + 2R1/RG).
3. A3 with matched resistors subtracts its two inputs: Vo = (R3/R2)(Vcm − Vcm) = 0.

Rejection happens in two steps. The first stage raises the differential signal relative to the common-mode one by (1 + 2R1/RG), which multiplies the CMRR by this factor. The difference amplifier then cancels what remains. Any residual mismatch in the R2/R3 network is trimmed with a potentiometer in one R3 to maximise CMRR.