Skip to main content

Compare CALL/RET with PUSH/POP

Short answer

CALL/RET transfer control by pushing/popping the return address to/from the stack; PUSH/POP only save/restore register pair data. CALL is 3 bytes/18 T-states, RET 1 byte/10 T-states; PUSH and POP are 1 byte, 12 and 10 T-states.

Compare CALL and RET instructions with PUSH and POP instructions for 8085. Illustrate their usages with appropriate examples.

Both pairs use the stack (LIFO area in RAM pointed to by SP), but CALL/RET transfer program control and save/restore the return address, while PUSH/POP only save/restore data.

PointCALL / RETPUSH / POP
PurposeGo to a subroutine and come backSave and restore register pair contents
Data storedReturn address (PC)Contents of BC, DE, HL or PSW (A + flags)
Effect on PCCALL loads PC with the subroutine address; RET loads PC from the stackPC only advances normally
Instruction lengthCALL 3 bytes, RET 1 byte1 byte each
T-statesCALL 18 (conditional 18/9), RET 10PUSH 12, POP 10
SP changeCALL: SP-2, RET: SP+2PUSH: SP-2, POP: SP+2
Who does the savingDone automatically by CPUDone by programmer explicitly
PairingEvery CALL needs a RETEvery PUSH needs a matching POP in reverse order

Illustration

Delay subroutine that must keep the caller's BC:

        LXI SP,27FFH    ; initialise stack
        MVI B,05H
        CALL DELAY      ; return address (next instruction) -> stack
        MOV A,B         ; B is still 05H
        HLT
DELAY:  PUSH B          ; save BC
        LXI B,0FFFFH
LP:     DCX B
        MOV A,B
        ORA C
        JNZ LP
        POP B           ; restore BC
        RET             ; PC <- return address from stack
  • CALL DELAY: PC (address of MOV A,B) is pushed, SP = 27FDH, PC = address of DELAY.
  • PUSH B: B and C go to the stack, SP = 27FBH.
  • POP B: B and C come back, SP = 27FDH.
  • RET: return address popped to PC, SP = 27FFH, execution continues at MOV A,B.

Note the order: the last item pushed must be the first popped, otherwise RET gets a wrong address.

✓ Answer checked by Claude Opus 5.5 (high effort)

All Microprocessor chapter 2 questions →