Address sequencing for control memory

Address sequencing

Address sequencing is the process of choosing the address of the next microinstruction in the control memory. The control memory holds the microprogram, in which microinstructions are stored in groups called routines (the fetch routine, one execute routine for each instruction, and so on). The control address register (CAR) holds the address of the microinstruction currently being read. Sequencing must handle normal sequential execution, branches, entry into a routine from the opcode, and subroutine call and return.

Selection of the next address

The next address is selected from one of four sources:

1. Incrementing CAR (CAR + 1): the next microinstruction in sequence.
2. Branch address field: an unconditional or a conditional branch loads the address (AD) field of the current microinstruction into CAR when the tested condition is true; otherwise CAR is incremented.
3. Mapping: the opcode bits of the instruction are converted by a mapping logic (ROM or logic circuit) to the starting address of the microprogram routine. For a 4-bit opcode and a 7-bit address: 0 xxxx 00.
4. Subroutine register (SBR): on CALL, the return address (CAR + 1) is saved in SBR and the branch address is loaded; on RETURN, SBR is loaded into CAR.

               Instruction code (opcode)
                          |
                   +------v------+
                   |   Mapping   |
                   |    logic    |
                   +------+------+
                          | mapped address
                          v
 Status bits     +-----------------+
 (I, S, Z)       |                 |<---- Branch address (AD field)
     |           |   Multiplexer   |<---- Return address (SBR)
 +---v----+select|  (next address) |<---- CAR + 1 --------+
 | Branch |----->|                 |                      |
 | logic  |      +--------+--------+                      |
 +---^----+               v                               |
     |             +-------------+      +-------------+   |
     | CD, BR      |     CAR     |----->| Incrementer |---+--> SBR (on CALL)
     |             +------+------+      +-------------+
     |                    v
     |             +-------------+
     |             |   Control   |
     |             |   memory    |
     |             +------+------+
     |                    v
     +------- microinstruction (microoperations, CD, BR, AD)

Control of selection

The CD (condition) field picks a status bit (I, S, Z or the constant 1), and the BR (branch) field gives the type of branch: JMP, CALL, RET or MAP. For JMP or CALL, if the selected condition is true the next address is AD; if it is false, it is CAR + 1. RET takes the address from SBR, and MAP takes the output of the mapping logic. At power-on, the initial address (for example 64, the start of the fetch routine) is loaded into CAR.