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Gain enhancement in Sallen-Key circuit

Short answer

Gain enhancement is done by returning capacitor C1 to a tap of an output divider (β = Rd/(Rc+Rd)). The op‑amp gain μ is increased so that the effective gain βμ = K = 3−1/Q, preserving ω0 and Q, while the overall dc gain becomes H = K/β > K. Then μ = 1+RB/RA = H and the divider sets β = K/H.

How can the gain enhancement be performed in a Sallen-Key circuit? Explain with necessary diagram.

In the equal-component Sallen-Key low-pass filter the amplifier gain is fixed by QQ (K=3−1/QK = 3 - 1/Q), so the dc gain is fixed too. Gain enhancement raises the overall gain above KK while keeping ω0\omega_0 and QQ unchanged.

Basic idea

The RC network only "sees" the voltage at the (+) input and the voltage fed back through C1C_1. Suppose the op-amp output is made larger by a factor 1/β1/\beta, but only the fraction βVo\beta V_o is fed back to C1C_1, with the effective gain βμ\beta\mu set equal to KK. The RC network then works exactly as before, while the output is 1/β1/\beta times larger.

Circuit

              C1
          +---||-------------------+
          |                        |
Vin--R1---+A--R2--+B--(+)          |
                  |     OA(mu)--+--|--- Vo
                 C2             |  |
                  |             Rc |
                 GND            +--+ Vo' = beta*Vo
                                |
                                Rd
                                |
                               GND
 OA(mu): non-inverting amp, mu = 1 + RB/RA

The op-amp output VoV_o drives a divider RcR_c, RdR_d; capacitor C1C_1 is returned to the tap Vo′=βVoV_o' = \beta V_o where β=RdRc+Rd<1\beta = \dfrac{R_d}{R_c + R_d} < 1 (keep Rc∥RdR_c\parallel R_d small compared with the impedance of C1C_1, or include it in the design).

Derivation

Let the non-inverting amplifier gain be μ=1+RB/RA\mu = 1 + R_B/R_A, so Vo=μVBV_o = \mu V_B and Vo′=βμVBV_o' = \beta\mu V_B. The RC network now sees an "effective gain" βμ\beta\mu from node B to the point where C1C_1 returns. Writing the node equations exactly as for the normal circuit with VoV_o replaced by Vo′V_o':

Vo′Vin=βμR1R2C1C2s2+s(1R1C1+1R2C1+1−βμR2C2)+1R1R2C1C2\frac{V_o'}{V_{in}} = \frac{\dfrac{\beta\mu}{R_1R_2C_1C_2}}{s^2 + s\left(\dfrac{1}{R_1C_1} + \dfrac{1}{R_2C_1} + \dfrac{1-\beta\mu}{R_2C_2}\right) + \dfrac{1}{R_1R_2C_1C_2}}

For the required QQ, set βμ=K=3−1/Q\beta\mu = K = 3 - 1/Q (equal-component case). Then ω0\omega_0 and QQ are the same as before, and the output is

VoVin=1β⋅Vo′Vin  ⇒  dc gain=Kβ>K\frac{V_o}{V_{in}} = \frac{1}{\beta}\cdot\frac{V_o'}{V_{in}} \;\Rightarrow\; \text{dc gain} = \frac{K}{\beta} > K

Design steps

  1. Design the normal equal-component Sallen-Key for ω0\omega_0 and QQ; this gives K=3−1/QK = 3 - 1/Q.
  2. For a required dc gain H>KH > K, choose β=K/H\beta = K/H.
  3. Set the op-amp gain μ=1+RB/RA=H\mu = 1 + R_B/R_A = H and choose the divider Rd/(Rc+Rd)=βR_d/(R_c+R_d) = \beta.

Example: Butterworth (Q=0.707Q = 0.707, K=1.586K = 1.586) with required gain H=5H = 5: β=1.586/5=0.317\beta = 1.586/5 = 0.317, μ=5\mu = 5 (RB=4RAR_B = 4R_A), and the divider is Rc=2.15RdR_c = 2.15R_d (e.g. Rd=1R_d = 1 kΩ\Omega, Rc=2.15R_c = 2.15 kΩ\Omega).

For gain reduction (the opposite case) the input resistor R1R_1 is split into a voltage divider instead.

✓ Answer checked by Claude Sonnet 5.5

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