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Asynchronous serial transfer of a character

Short answer

In asynchronous transfer, each character is framed with a start bit (low), 7 data bits (LSB first), a parity bit, and two stop bits (high). The receiver synchronizes on the falling edge and samples at mid-bit; no common clock, but baud rates must match. Frame efficiency is 7/11.

Explain the transferring of serial data using asynchronous transfer. One character is formed with 7-bit ASCII code, 1-bit start, 2-bit stop and 1-bit parity.

In asynchronous serial transfer each character is sent as a separate frame with no common clock; the sender and receiver use the same baud rate and synchronise at the start of every character with a start bit.

Frame format (given)

Idle line = logic 1 (mark). Frame: 1 start bit (0) + 7 data bits (LSB first) + 1 parity bit + 2 stop bits (1) = 11 bits.

Example: character "A" (ASCII 41H = 1000001), even parity

Data bits 1000001 contain two 1s, so the even parity bit = 0. Sent LSB first: D0 = 1, D1 to D5 = 0, D6 = 1.

  id  st  D0  D1  D2  D3  D4  D5  D6  P   S1  S2  id
  1   0   1   0   0   0   0   0   1   0   1   1   1
 ----\___/---\___________________/---\___/-----------

Operation

  1. The UART transmitter loads the character into a shift register and adds the start bit, parity bit and stop bits.
  2. It shifts the bits out at the baud rate (bit time = 1/baud).
  3. The receiver detects the falling edge (idle to start), waits half a bit time to check that the line is still low, and then samples each bit in the middle (using a 16x clock).
  4. It checks the parity and that the stop bits are 1, removes the framing bits and stores the 7-bit character. It flags a parity error, framing error or overrun error if something is wrong.
  5. The line then stays at the idle 1 state until the next start bit.

Efficiency

7 information bits out of 11 = 63.6%. The two stop bits give the receiver more time to prepare for the next character (needed for slow, electromechanical devices).

✓ Answer checked by Claude Sonnet 5.5

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