TDM types and pulse stuffing

Time Division Multiplexing (TDM) is a technique in which several signals share one channel by occupying it in turn: time is divided into frames, and each frame into time slots, one slot per input. Each input uses the full channel bandwidth during its slot. Digital telephony uses PCM TDM: each voice channel is sampled 8000 times/s, so a frame is 125 µs long.

 |<-------------- one frame ------------->|
 | S1 | S2 | S3 | ... | SN | S1 | S2 | ...
  slot slot              slot
 S_i = time slot of channel i

Types of TDM

1. Synchronous TDM: every input has a fixed slot in every frame, even if it has no data. The slot position identifies the channel. Simple and good for constant-rate voice (T1, E1), but slots of idle inputs are wasted.
2. Statistical (asynchronous) TDM: slots are given only to inputs that have data, and each slot carries the source address. The link rate can be less than the sum of input rates; suits bursty data but needs buffers and address overhead.
3. By the way the frame is built, TDM may also be:
   • Bit interleaved – one bit from each tributary in turn (used in PDH higher-order multiplexers).
   • Word (byte) interleaved – one 8-bit word from each channel in turn (used in T1/E1, SDH).

Example: in E1, 30 voice channels plus 2 control slots are byte interleaved: $32 \times 8 \times 8000 = 2.048$ Mbps.

Pulse stuffing and why it is needed

Pulse stuffing (justification) is the insertion of extra dummy bits into a tributary stream so that its rate exactly matches the slot rate of a higher-order multiplexer.

Need:

• Tributaries (e.g. four E1 signals into an E2) come from different sources with independent clocks, which differ slightly (plesiochronous).
• The multiplexer reads them at one common rate. Without correction, buffers would underflow or overflow, causing slips (lost/repeated bits) and frame loss.
• The multiplexer is therefore run slightly faster than any tributary; whenever a tributary's buffer is nearly empty, a stuff bit is inserted. Stuffing control bits, repeated three times and decoded by majority vote, tell the demultiplexer where stuff bits are, so it can remove them and recover the original clock with a PLL.
• This is why higher PDH rates exceed the sum of inputs: $8.448 > 4 \times 2.048 = 8.192$ Mbps.