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Minterms/maxterms; K-map Σ(1,3,5,8,10,11,12)+d

Short answer

A minterm is an AND term with all variables, true for one input; a maxterm is an OR term with all variables, false for one input. Simplified: F = B'C + A'C'D + AC'D'. The circuit uses AND-OR gates with inverters.

Define min-terms and max-terms. Simplify the function using K-map, F = Σ(1,3,5,8,10,11,12) and D = Σ(2,9,15) and also realize the simplified logic circuit.

Min-terms and max-terms

A minterm is a product (AND) term that contains every variable of the function exactly once, in true or complemented form. It equals 1 for exactly one input combination. A variable is written true if its value is 1 and complemented if it is 0; e.g. for ABC = 101 the minterm is m5=AB‾Cm_5 = A\overline{B}C. A function in canonical SOP is a sum of minterms: F=Σm(… )F = \Sigma m(\dots).

A maxterm is a sum (OR) term that contains every variable exactly once, in true or complemented form. It equals 0 for exactly one input combination. A variable is written true if its value is 0 and complemented if it is 1; e.g. for ABC = 101 the maxterm is M5=A‾+B+C‾M_5 = \overline{A}+B+\overline{C}. A function in canonical POS is a product of maxterms: F=ΠM(… )F = \Pi M(\dots).

Mi=mi‾M_i = \overline{m_i}, and a function's minterm list and maxterm list are complementary (together they hold all 2n2^n numbers).

K-map simplification

F(A,B,C,D)=Σm(1,3,5,8,10,11,12)+d(2,9,15)F(A,B,C,D) = \Sigma m(1,3,5,8,10,11,12) + d(2,9,15)

        CD
AB      00  01  11  10
      +---+---+---+---+
 00   | 0 | 1 | 1 | X |
      +---+---+---+---+
 01   | 0 | 1 | 0 | 0 |
      +---+---+---+---+
 11   | 1 | 0 | X | 0 |
      +---+---+---+---+
 10   | 1 | X | 1 | 1 |
      +---+---+---+---+
  • Pair m(1,5) → A‾ C‾D\overline{A}\,\overline{C}D
  • Pair m(8,12) → AC‾ D‾A\overline{C}\,\overline{D}
  • Quad m(2,3,10,11) → B‾C\overline{B}C
F=B‾C+A‾ C‾D+AC‾ D‾F = \overline{B}C + \overline{A}\,\overline{C}D + A\overline{C}\,\overline{D}

Check: 3, 10, 11 by B‾C\overline{B}C (with don't-care 2); 1, 5 by A‾ C‾D\overline{A}\,\overline{C}D; 8, 12 by AC‾ D‾A\overline{C}\,\overline{D}. Don't-cares 9 and 15 are not needed.

Logic circuit (AND-OR)

B' ─┐
C  ─┴─[AND]── B'C ────┐
A' ─┐                 │
C' ─┼─[AND]── A'C'D ──┼─[OR]── F
D  ─┘                 │
A  ─┐                 │
C' ─┼─[AND]── AC'D' ──┘
D' ─┘

Complements A‾,B‾,C‾,D‾\overline{A}, \overline{B}, \overline{C}, \overline{D} come from NOT gates. The circuit needs one 2-input AND, two 3-input ANDs and one 3-input OR (plus inverters).

✓ Answer checked by Claude Opus 5.5 (high effort)

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