- 2069 Asar · 2+2 marks
Active load preference and Widlar in IC biasing
Short answer
Active loads offer high small-signal resistance with small dc drop, double differential gain, and save chip area. The Widlar source generates small currents using small resistors, gives high output resistance Ro≈ro(1+gmRE), and reduces sensitivity to supply and β variations.
Why active load is preferred than passive load? What is the advantage of using Widlar current source in biasing circuits for IC design?
Why active load is preferred over passive load
- Much higher gain: gain = gm × load resistance. A transistor current source gives a small-signal resistance ro (50 kΩ to MΩ) while dropping only a few tenths of a volt dc. A resistor of the same value would need a very large dc drop and supply voltage.
- Gain is doubled in a differential pair: the current-mirror load converts the differential output to single-ended without losing half the signal (Ad = gm(ro2‖ro4) instead of gm·RC/2).
- Less chip area: a transistor occupies much less area than a large resistor.
- Large output swing and better use of a low supply, since the dc drop is small.
- Better CMRR and good temperature tracking (matched devices).
Advantage of Widlar current source in IC biasing
- Gives very small bias currents (µA) with small resistors: IO·RE = VT ln(IREF/IO), so a 10 µA source needs only about 12 kΩ instead of about 1.4 MΩ, saving chip area.
- Higher output resistance, Ro ≈ ro(1 + gm RE), so the current is more constant.
- The output current is less sensitive to supply voltage and β changes because of the emitter degeneration.
- Used for the low input-stage current of the 741, giving low input bias current and high input resistance.
✓ Answer checked by Claude Opus 5.5 (high effort)
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