IC biasing, Widlar advantages, differential gain

Principle of biasing in IC design

• Large resistors and capacitors are costly in chip area, but transistors are cheap and well matched.
• So stages are direct coupled and biased with constant current sources (current mirrors) instead of resistor networks.
• A single reference current is set by one resistor and copied to all stages (current steering); scaled emitter areas or Widlar sources give other current values.

Advantages of the Widlar current source

• Small currents (µA) with small resistors, so less chip area.
• High output resistance, Ro ≈ ro(1 + gm RE).
• Lower sensitivity of IO to VCC, β and temperature.

Differential-mode voltage gain of BJT differential amplifier

         +VCC           +VCC
          |               |
          RC              RC
          +-- vo1   vo2 --+
          |               |
 v1 ---B Q1              Q2 B--- v2
          |               |
          +-------+-------+
                  | E
                  RE  (tail)
                  |
                -VEE

Apply a pure differential input: v1 = +vd/2, v2 = −vd/2. The emitter currents of Q1 and Q2 change by equal and opposite amounts, so the current in RE does not change and the common emitter point is at ac ground. Each half is then a common-emitter amplifier:

Half circuit: input vd/2, load RC, emitter grounded
ic1 = gm·(vd/2),   ic2 = -gm·(vd/2)
vo1 = -gm·RC·vd/2
vo2 = +gm·RC·vd/2

Gains (with gm = IC/VT = (IEE/2)/VT):

Double-ended output: vod = vo2 - vo1 = gm·RC·vd
   Ad = vod/vd = gm·RC = β·RC/rπ
Single-ended output:
   Ad = vo2/vd = gm·RC/2

If an unbypassed resistor RE' is added in each emitter, the double-ended gain becomes Ad ≈ RC/(re + RE'), where re = 1/gm ≈ VT/IE. The differential input resistance is 2rπ (or about 2(β + 1)(re + RE') with the emitter resistors).