Non-inverted R-2R ladder DAC output

A non-inverted (voltage-mode) R-2R ladder DAC is built from only two resistor values, R and 2R. The digital bits switch each 2R leg between Vref (bit = 1) and ground (bit = 0). The output is taken at the MSB end of the ladder and is usually buffered by an op-amp.

Circuit (4-bit)

 Vo <--+-----R-----+-----R-----+-----R-----+
       |           |           |           |
       2R          2R          2R          2R      2R
       |           |           |           |       |
      b3(MSB)     b2          b1          b0(LSB) GND
  (each switch: 1 -> Vref, 0 -> GND)
 Vo -> non-inverting buffer -> Vout

Key property

Looking from any node towards the LSB end, the resistance is 2R. At the LSB node, its own 2R leg in parallel with the 2R termination gives R, and adding the series R gives 2R. This repeats at every node.

Derivation by superposition

Take one bit at a time with the other switches at ground.

1. MSB (b3) alone. The rest of the ladder seen from the output node is 2R to ground. The MSB leg 2R and the 2R to ground form a divider: V = Vref/2.
2. b2 alone. At node 2, the 2R leg (from Vref) and the 2R ladder section to its right form a Thevenin source of Vref/2 with resistance R. This passes through the series R to the output node, where the 2R MSB leg to ground forms a divider: V = (Vref/2)·2R/(R + R + 2R) = Vref/4.
3. In the same way b1 gives Vref/8 and b0 (LSB) gives Vref/16.

Adding the contributions:

Vo = Vref (b3/2 + b2/4 + b1/8 + b0/16)
   = (Vref / 2⁴)(8·b3 + 4·b2 + 2·b1 + b0)

For an n-bit ladder:

Vo = (Vref / 2ⁿ) · Σ bk·2ᵏ   (k = 0 … n−1)
   = Vref · D / 2ⁿ

Here D is the decimal value of the input word.

Results

• Resolution (1 LSB) = Vref/2ⁿ
• Full-scale output = Vref(2ⁿ − 1)/2ⁿ
• Output impedance of the ladder is always R, so a buffer with gain (1 + Rf/R1) can be added: Vout = (1 + Rf/R1)·Vref·D/2ⁿ.

Example: n = 4, Vref = 8 V, D = 1010 (10). Vo = 8 × 10/16 = 5 V.

Advantages

• Only two resistor values, so it is easy to trim and to make as an IC.
• The output resistance is constant at R.

Drawback: the voltage at each node changes as bits switch, so stray capacitances charge and discharge. This makes it slower than the inverted (current-mode) ladder.