Address-format code for X=(A*B/C)-(D+E/F)

Assumptions: the operands are memory locations, R1, R2, ... are CPU registers, T1, T2, ... are temporary memory locations, and X receives the result. Multiplication and division are done before addition and subtraction, and equal-priority operators go left to right.

Fully bracketed: X = ((A*B)/C)-(D+(E/F)). Postfix (reverse Polish) form: A B * C / D E F / + -.

Three-address instructions (OP dest, src1, src2)

MUL R1, A, B   ; R1 = A * B
DIV R2, R1, C  ; R2 = R1 / C
DIV R3, E, F   ; R3 = E / F
ADD R4, D, R3  ; R4 = D + R3
SUB X, R2, R4  ; X = R2 - R4

Number of instructions: 5. Shortest program, but each instruction is long (three addresses).

Two-address instructions (OP dest, src; dest = dest OP src)

MOV R1, A   ; R1 = A
MUL R1, B   ; R1 = R1 * B
DIV R1, C   ; R1 = R1 / C
MOV R2, D   ; R2 = D
MOV R3, E   ; R3 = E
DIV R3, F   ; R3 = R3 / F
ADD R2, R3  ; R2 = R2 + R3
SUB R1, R2  ; R1 = R1 - R2
MOV X, R1   ; X = R1

Number of instructions: 9. A MOV is needed first because the destination operand is overwritten.

One-address instructions (accumulator AC is the implied operand)

LOAD E    ; AC = E
DIV F     ; AC = AC / F
ADD D     ; AC = AC + D
STORE T1  ; T1 = AC
LOAD A    ; AC = A
MUL B     ; AC = AC * B
DIV C     ; AC = AC / C
SUB T1    ; AC = AC - T1
STORE X   ; X = AC

Number of instructions: 9. Intermediate results that cannot stay in AC are saved in memory temporaries.

Zero-address instructions (stack machine)

PUSH A  ; push A
PUSH B  ; push B
MUL     ; pop two, compute, push result
PUSH C  ; push C
DIV     ; pop two, compute, push result
PUSH D  ; push D
PUSH E  ; push E
PUSH F  ; push F
DIV     ; pop two, compute, push result
ADD     ; pop two, compute, push result
SUB     ; pop two, compute, push result
POP X   ; X = top of stack

Number of instructions: 12. Only PUSH and POP carry an address; ADD, SUB, MUL, DIV work on the top two stack items, so the program follows the postfix form directly.

Summary: 3-address = 5, 2-address = 9, 1-address = 9, 0-address = 12 instructions. Fewer addresses per instruction means shorter instructions but more of them.