- Asked 16/22
- 2074 Chaitra · 8 marks
Address-format code for X=(P+Q)×(R+S)
Short answer
The expression X = (P+Q)*(R+S) requires 3 three-address, 6 two-address, 7 one-address and 8 zero-address instructions. The postfix form is P Q + R S + *.
Write codes using 3, 2, 1 and 0 address instruction formats to perform the operation X = (P+Q) × (R+S).
Assumptions: the operands are memory locations, R1, R2, ... are CPU registers, T1, T2, ... are temporary memory locations, and X receives the result. Multiplication and division are done before addition and subtraction, and equal-priority operators go left to right.
Fully bracketed: X = (P+Q)*(R+S). Postfix (reverse Polish) form: P Q + R S + *.
Three-address instructions (OP dest, src1, src2)
ADD R1, P, Q ; R1 = P + Q
ADD R2, R, S ; R2 = R + S
MUL X, R1, R2 ; X = R1 * R2
Number of instructions: 3. Shortest program, but each instruction is long (three addresses).
Two-address instructions (OP dest, src; dest = dest OP src)
MOV R1, P ; R1 = P
ADD R1, Q ; R1 = R1 + Q
MOV R2, R ; R2 = R
ADD R2, S ; R2 = R2 + S
MUL R1, R2 ; R1 = R1 * R2
MOV X, R1 ; X = R1
Number of instructions: 6. A MOV is needed first because the destination operand is overwritten.
One-address instructions (accumulator AC is the implied operand)
LOAD P ; AC = P
ADD Q ; AC = AC + Q
STORE T1 ; T1 = AC
LOAD R ; AC = R
ADD S ; AC = AC + S
MUL T1 ; AC = AC * T1
STORE X ; X = AC
Number of instructions: 7. Intermediate results that cannot stay in AC are saved in memory temporaries.
Zero-address instructions (stack machine)
PUSH P ; push P
PUSH Q ; push Q
ADD ; pop two, compute, push result
PUSH R ; push R
PUSH S ; push S
ADD ; pop two, compute, push result
MUL ; pop two, compute, push result
POP X ; X = top of stack
Number of instructions: 8. Only PUSH and POP carry an address; ADD, SUB, MUL, DIV work on the top two stack items, so the program follows the postfix form directly.
Summary: 3-address = 3, 2-address = 6, 1-address = 7, 0-address = 8 instructions. Fewer addresses per instruction means shorter instructions but more of them.
✓ Answer checked by Claude Opus 5.5 (high effort)
Related questions
- Address-format code for Y=(A+B)*(C+D) · Computer Organization and Architecture, chapter 2 · asked 16×
- Address-format code for X=(A*B/C)-(D+E/F) · Computer Organization and Architecture, chapter 2 · asked 16×
- Address-format code for Y=A*(B+D/C)+(G*E)/F · Computer Organization and Architecture, chapter 2 · asked 16×
- Address-format code for Y=A/(B+C)+(D+E)*F · Computer Organization and Architecture, chapter 2 · asked 16×
- Address-format code for Y=(A+B)*(C+D)+G/E*F · Computer Organization and Architecture, chapter 2 · asked 16×
- Address-format code for X=(A-B*F)*C+D/E · Computer Organization and Architecture, chapter 2 · asked 16×
- Address-format code for Y=A/B+(C×D)+F(H/G) · Computer Organization and Architecture, chapter 2 · asked 16×
- Address-format code for Y=AB+(C/D)+E(F/G) · Computer Organization and Architecture, chapter 2 · asked 16×
- Address-format code for Y=(A-B+C)*(E+F/G) · Computer Organization and Architecture, chapter 2 · asked 16×
- Address-format code for Y=(A-B/C)×(D+E×G)/F · Computer Organization and Architecture, chapter 2 · asked 16×
- Address-format code for Y=(A-B/C)*[D+(E*G)] · Computer Organization and Architecture, chapter 2 · asked 16×
- Address-format code for Y=(W+X)*(Y-Z) · Computer Organization and Architecture, chapter 2 · asked 16×
- Address-format code for Y=(A+B)/C+D/(E*F) · Computer Organization and Architecture, chapter 2 · asked 16×
- Address-format code for Y=AB+(F/G)+CD · Computer Organization and Architecture, chapter 2 · asked 16×
- Instruction fields and address formats for X=(E+F)*(G+H) · Computer Organization and Architecture, chapter 2
- Instruction and data format, addressing modes · Microprocessor, chapter 2 · asked 2×
- Datapath operation and instruction cycles · Embedded System, chapter 2
- Convolutional vs block codes; (7,4) cyclic code for 1011 · Communication Systems, chapter 8 · asked 2×
All Computer Organization and Architecture chapter 2 questions →