- 2067 Asar (old course) · 2+6 marks
Cache management; direct vs associative address structure
Short answer
Cache management assigns memory blocks to cache lines, checks tags for hits, handles misses, and enforces write policy. Direct mapping uses tag, line, and word fields; the line field selects one line for a single comparison. Associative mapping uses only tag and word; all tags are compared simultaneously, requiring longer tags and more hardware.
Why is cache management necessary in the mapping process? Differentiate between direct mapping address structure and associative mapping address structure.
Need for cache management
The cache is much smaller than main memory, so only some blocks can be stored. A mapping process is needed to decide where a block goes and how to find it again. Cache management does this job: it checks tags for a hit or miss, loads blocks on a miss, chooses a victim (replacement algorithm), keeps cache and memory consistent (write policy), and maintains valid and dirty bits. Without it the CPU could not know whether the cache holds the wanted word, nor keep the data correct.
Address structure
Example: 16-bit address, block of 4 words, cache of 16 lines.
| Point | Direct mapping | Associative mapping |
|---|---|---|
| Fields | Tag, Line, Word | Tag, Word |
| Example sizes | 10, 4, 2 bits | 14, 2 bits |
| Meaning of tag | Higher-order bits that identify one of the blocks sharing the line | The complete block number |
| Line field | Selects the single line to check | None, all lines are searched |
| Tag length | Shorter | Longer, so the tag memory is larger |
| Search | One comparison | Comparison with every tag |
Direct: | Tag 10b | Line 4b | Word 2b |
Associative: | Tag 14b | Word 2b |
✓ Answer checked by Claude Opus 5.5 (high effort)
Related questions
- Write policy; direct vs associative mapping · Computer Organization and Architecture, chapter 6
- Associative cache mapping with example · Computer Organization and Architecture, chapter 6
- Direct cache mapping · Computer Organization and Architecture, chapter 6 · asked 3×
- Direct mapping with 32-block memory, 8-block cache · Computer Organization and Architecture, chapter 6 · asked 3×
- Cache read and direct-mapping demerits · Computer Organization and Architecture, chapter 6
- Cache mapping techniques · Computer Organization and Architecture, chapter 6 · asked 7×
- Associative cache mapping · Embedded System, chapter 4 · asked 2×
- Cache memory mapping techniques · Embedded System, chapter 4 · asked 3×
- Mapping of project management · ICT Project Management, chapter 6
- Unique vs non-unique address decoding · Instrumentation II, chapter 2
All Computer Organization and Architecture chapter 6 questions →