Chapter 6 · Watch, then practise
Memory System
Relate cache placement and write behavior to the cost of a memory access.
3 questions · 3 with related videos. Matches are based on playlist titles; broader background matches are labeled.
What to study
- Locality
- Direct and associative mapping
- Address fields
- Average memory access time
- Write policies
Chapter playlists
Choose a playlist
Direct Mapping Explained with Example in Hindi Part-1 l Computer Organization and Architecture
5 Minutes Engineering · 9:16
Choose a video · 2 lectures
Related direct-mapping examples; use this question’s line count and block size for its address fields.
1. Cache address fields
A direct-mapped cache has 64 lines of 16 bytes with 32-bit byte addresses. Split the address.
The block offset needs log₂16 = 4 bits. The line index needs log₂64 = 6 bits. The remaining 32 − 4 − 6 = 22 bits form the tag. Direct mapping permits one line per memory block; set associativity offers several lines within one set, while full associativity permits any line.
Average Access Time of Memory and Access Speed of Memory | COA
Engineering Funda · 12:38
Supplementary average-memory-access-time lesson; the answer uses the stated additional miss penalty.
2. Average access time
Hit time is 2 ns, miss rate is 5%, and additional miss penalty is 60 ns. Find AMAT.
AMAT = hit time + miss rate × additional miss penalty = 2 + 0.05 × 60 = 5 ns. The 60 ns is extra time after checking the cache. If a problem instead gives total miss access time, use a weighted hit/miss average to avoid counting the cache lookup twice.
Write Back Updation Technique in Cache Memory | COA
Engineering Funda · 12:01
Supplementary write-back cache lesson for understanding modified cache blocks.
3. Writes and dirty blocks
Why does a write-back cache need a dirty bit?
Write-back changes the cached copy first. A dirty bit records that memory is older, so eviction must write that block back. Write-through sends each write to the next memory level instead. These choices are separate from deciding whether a write miss allocates a cache line.