Chapter 1 · Watch, then practise
Introduction
Connect the programmer-visible instruction set to the hardware that executes a stored program.
3 questions · 3 with related videos. Matches are based on playlist titles; broader background matches are labeled.
What to study
- Instruction set architecture
- Stored-program model
- Datapath and control
Chapter playlists
Choose a playlist
Computer Architecture Vs Computer Organization l Computer Organization and Architecture Course
5 Minutes Engineering · 5:59
Compares architecture with organization, the distinction behind sharing an instruction set while using different hardware.
1. Architecture and implementation
Can two processors execute the same machine code while having different hardware?
Yes. An instruction set architecture specifies operations, registers and instruction behavior visible to software. An implementation supplies the circuitry that realizes that contract. Two implementations may use different pipelines, caches or control logic while preserving the specified results. Compatibility does not imply equal execution time.
The Von Neumann Architecture
Engineers Minute · 2:27
Related stored-program architecture lesson from the existing Microprocessor introduction playlist.
2. Stored programs
What changes when instructions are stored in memory?
Instructions become encoded values that the CPU fetches and interprets. Loading a different sequence changes the computation without rewiring the datapath. The program counter selects the next instruction; a branch changes that sequence. In the basic von Neumann model, instructions and data share the memory system.
Micro Operations of Instruction in Computer Organization & Architecture | COA
Engineering Funda · 9:09 · Background lecture
Micro-operations provide background for separating register transfers and ALU work from their control signals.
3. Datapath and control
For R3 ← R1 + R2, distinguish the datapath work from the control work.
The datapath reads R1 and R2, adds their values and provides a route to R3. Control chooses the source registers, selects addition and enables the destination write at the appropriate clock edge. Correct data paths are insufficient if their select or write-enable signals are wrong.