Memory Management

Differentiate fixed and variable partitioning. Apply optimal page replacement to the reference string below using four frames.

Reference string: 0, 9, 0, 1, 8, 1, 8, 7, 8, 7, 1, 2, 8, 2, 7, 8, 2, 2, 8, 3.

The source reports 7 page faults. The original replacement table and calculation are preserved without recalculation:

What is thrashing? Apply FIFO, optimal, LRU, and LFU page replacement with three frames to the reference string in the original question.

Thrashing occurs when excessive paging or swapping leaves little time for useful execution. Processes competing for memory suffer frequent page faults and poor performance.

The source reports FIFO 15, optimal 9, LRU 12, and LFU 13 page faults. The reference string, all frame tables, and working are preserved below; these are source results rather than independently validated calculations.

Differentiate compaction and coalescing. Explain logical-to-physical address translation using paging with an example.

Compaction moves processes to combine free memory into a larger region and consumes CPU time. Coalescing joins adjacent free regions without moving the allocated processes, requiring less work.

Paging divides physical memory into fixed-size frames and logical memory into pages of the same size. A logical address contains a page number and an offset. The page number indexes the page table to obtain a frame number; the frame number and offset identify the physical location. The source illustrates a 16-bit address and 4 KB pages, giving a 12-bit offset and a 4-bit page number.

The source's written address expression is reproduced as an image; it should not be read as a verified arithmetic formula.

Demonstrate Belady's anomaly using FIFO with three and four frames.

Reference string: 3, 2, 1, 0, 3, 2, 4, 3, 2, 1, 0, 4, 2, 3, 2, 1, 0, 4.

The source's tables report 14 faults with three frames and 15 with four frames, illustrating an increase in faults despite adding a frame. Original tables and formulas:

Under what circumstances does a page fault occur? Apply LRU, FIFO, and optimal replacement with three frames to the given reference string.

A page fault occurs when an accessed page is absent from main memory. The OS checks whether the access is valid, aborting an invalid access. Otherwise it obtains a frame, reads the page from backing storage, updates process and page-table information, and restarts the interrupted instruction.

Reference string: 1, 2, 3, 4, 2, 1, 5, 6, 2, 3, 7, 6, 3, 2, 1, 2, 3, 6.

The original answer reports LRU 14, FIFO 15, and optimal 11 faults. Exact working:

Define page fault and demand paging. A logical address space has eight pages of 8 KB each, with sixteen physical frames. Use the supplied page table to translate logical address 18325.

Demand paging loads a page only when a process accesses it. Accessing a page not currently in memory causes a page fault.

The source's page table maps pages 7, 6, 5, 4, 3, 2, 1, 0 to frames 10, 4, 0, 7, 13, 11, 14, 5 respectively. Its working uses 3 page bits, 13 offset bits, and 4 frame bits. Logical address 18325 selects page 2 and frame 11; the source obtains physical address 92053.

The original binary expressions, page table, and arithmetic are preserved here:

Apply the requested replacement algorithms to the reference string:

1, 2, 3, 4, 2, 1, 5, 6, 2, 1, 2, 3, 7, 6, 3, 2, 1, 2, 3, 6.

Answer in the source: An arrow refers to the 2073 Magh solution, reproduced as Question 5.

The written reference string contains additional references and is not identical to Question 5. No separate worked solution is supplied; the earlier fault counts should not automatically be applied to this different string. The exact handwritten question is preserved below.

Explain the role of a TLB.

A translation lookaside buffer is a cache holding recent virtual-to-physical address translations. Looking up a translation in the TLB reduces the memory accesses required for address translation.

Explain a resident monitor. A logical address space has eight pages of 1024 words each, mapped into a physical memory of 32 frames. How many bits are required for logical and physical addresses?

A resident monitor was an early operating-system precursor that remained in memory. It loaded nonresident programs and handled setup and cleanup between jobs. The source discusses its use in early computer systems.

The source assigns 3 page-number bits, 10 offset bits, and 5 frame-number bits. It gives 13 bits for a logical address and 15 bits for a physical address. Original formulas:

Use three frames for the reference string 2, 3, 5, 4, 2, 5, 7, 3, 8, 7 and compare FIFO, LRU, and optimal replacement.

The source reports FIFO 8 faults / 2 hits, LRU 8 faults / 2 hits, and optimal 7 faults / 3 hits. All original table entries and calculation steps are retained: