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Microprogram sequencer

Short answer

The microprogram sequencer uses a multiplexer to select the next address from CAR+1, branch address field, SBR, or mapping logic. The CD field selects a status bit; the BR field and test condition determine the selection via input logic. For CALL, the return address is saved in SBR; for MAP, the opcode is mapped to a routine start address.

Draw the block diagram of the microprogram sequencer for a control memory and explain its operations.

The microprogram sequencer is the part of the control unit that generates the address of the next microinstruction. It contains the next-address logic and CAR; together with the control memory, it forms the microprogrammed control unit. Mano's design has the following parts.

          Instruction     Status bits (I,S,Z)
          opcode (IR)          |
              |            +---v----+
        +-----v-----+      | MUX 1  |<-- CD field (select)
        | Mapping   |      +---+----+
        | logic     |          |
        +-----+-----+      +---v----------+
              |            | Input logic  |<-- BR field
              |            | (I0 I1 T)    |
              |            +---+----------+
              |         S1 S0 | L (load SBR)
              v               v
        +--------------------------------+
  AD -->|  MUX 2  (selects address)      |<-- SBR
  field |  0: CAR+1  1: branch (AD)      |
        |  2: SBR    3: map              |
        +---------------+----------------+
                        v
                  +-----------+   +--------+
                  |    CAR    |-->| Control|
                  +-----+-----+   | memory |
                        |         +---+----+
                  +-----v-----+       v
                  | Incrementer|  microinstruction
                  +------------+  (to control data reg.)

Operation

  1. The CD field selects one status bit (I, S, Z, or the constant 1) through MUX 1. The result is the signal T (test condition true).

  2. The BR field (I1 I0) and T go to the input logic, which produces the select lines S1 S0 for MUX 2 and the load signal L for SBR:

    • JMP (00): S1S0 = 01 if T = 1 (branch to AD), S1S0 = 00 if T = 0 (increment).
    • CALL (01): same as JMP; in addition, when T = 1, L = 1 loads the return address (CAR + 1) into SBR.
    • RET (10): S1S0 = 10, selecting SBR.
    • MAP (11): S1S0 = 11, selecting the mapping logic.

    In Boolean form: S1 = I1, S0 = I1·I0 + I1'·T, L = I1'·I0·T.

  3. MUX 2 passes one of CAR + 1, the AD field, the SBR contents or the mapped address to CAR.

  4. CAR addresses the control memory, which outputs the microinstruction into the control data register; its fields drive the datapath.

  5. The incrementer forms CAR + 1, which is input 0 of MUX 2 and is the value stored in SBR during a CALL.

✓ Answer checked by Claude Opus 5.5 (high effort)

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