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RISC vs CISC

Short answer

RISC uses a small set of simple, fixed-length, one-cycle instructions with load/store architecture and hardwired control, enabling easy pipelining but larger code. CISC employs complex, variable-length, multi-cycle instructions with microprogramming, reducing code size but complicating design and pipelining.

Differentiate / compare RISC and CISC architecture.

RISC (Reduced Instruction Set Computer) uses a small set of simple, fixed-length instructions that execute in about one clock cycle. CISC (Complex Instruction Set Computer) uses a large set of complex, variable-length instructions, some of which do multi-step work.

BasisRISCCISC
Instruction setSmall (about 50–100), simpleLarge (200 or more), complex
Instruction lengthFixed (e.g. 32 bits)Variable
ExecutionMostly one cycle per instructionMany cycles, varying
Addressing modesFew (3–5)Many
Memory accessOnly LOAD and STORE access memory (load/store architecture)Many instructions access memory directly
RegistersLarge register file (32 or more)Few registers
Control unitHardwired, fastMicroprogrammed, slower
PipeliningEasy and efficientDifficult
Code sizeLarger programs (more instructions)Smaller programs
CompilerMore work for the compilerLess work, hardware does more
Cost / design timeCheaper, simpler chipComplex, costly
ExamplesARM, MIPS, SPARC, PowerPCIntel x86, VAX, Motorola 68000

✓ Answer checked by Claude Opus 5.5 (high effort)

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