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Errors in ADC and DAC

Short answer

Errors: offset error (non‑zero output at zero input), gain error (incorrect slope), integral nonlinearity (INL) and differential nonlinearity (DNL). DNL < –1 LSB causes missing codes in ADC and non‑monotonicity in DAC. ADC adds quantisation error (±½ LSB) and aperture jitter; DAC may exhibit glitches.

Explain the errors associated with A/D and D/A converters.

Real converters differ from the ideal transfer characteristic. The main errors of A/D and D/A converters are as follows (LSB = 1 least significant bit = FSR / 2^n).

Errors common to ADC and DAC

  1. Offset error: the transfer curve is shifted; with zero input the output is not zero (DAC) or the first transition does not occur at 0.5 LSB (ADC). Can be trimmed to zero.
  2. Gain (full-scale) error: the slope of the characteristic is wrong, so the full-scale output or last code transition differs from ideal. It is the difference between actual and ideal full-scale after offset is removed.
  3. Nonlinearity:
    • Integral nonlinearity (INL): maximum deviation of the actual transfer curve from the ideal straight line.
    • Differential nonlinearity (DNL): deviation of each step width from 1 LSB. DNL <= -1 LSB gives missing codes in an ADC and non-monotonicity in a DAC.
  4. Temperature drift and supply sensitivity: offset, gain and reference change with temperature and supply voltage (PSRR).
  5. Noise: thermal and reference noise reduce effective resolution (ENOB).

ADC-specific errors

  1. Quantisation error: the analog input is mapped to a finite number of codes, so there is an error of up to +/-1/2 LSB (uncertainty of 1 LSB). It cannot be removed, only reduced by more bits.
  2. Missing codes: some output codes never appear.
  3. Aperture error / jitter: uncertainty of the sampling instant; error = slew rate x aperture time.
  4. Aliasing: if sampling rate is less than twice the highest input frequency, high frequencies appear as false low ones.
  5. Conversion time/ hold droop: the input changes during conversion unless S/H is used.

DAC-specific errors

  1. Non-monotonicity: output decreases when code increases (large DNL).
  2. Settling time: time to reach within 1/2 LSB after a code change; limits speed.
  3. Glitches: momentary spikes at major carry transitions (for example 0111 1111 to 1000 0000) because switches change at different times.
  4. Resistor mismatch in R-2R ladder and switch on-resistance cause nonlinearity.
 Output code
  ^        ideal
  |       /  actual with gain error
  |   . /
  |  . /     offset error shifts the line
  | ./
  +--------------------> Input

✓ Answer checked by Claude Sonnet 5.5

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