- 2072 Kartik · 4 marks
USB signals and bus states
Short answer
USB uses differential D+ and D- with NRZI coding. Bus states: J (D+ high, D- low) idle, K (D+ low, D- high) data, SE0 (both low) for EOP and reset. Full-speed devices pull D+ up with 1.5 kΩ; low-speed pull D- up. Hosts have 15 kΩ pull-downs.
Explain the USB signals and associated bus states. Also mention the signal levels to achieve these bus states.
USB uses a four-wire cable: VBUS (+5 V), D-, D+ and GND. Data is sent on the twisted pair D+ and D- by differential signalling (NRZI coding with bit stuffing). The voltage combination on D+ and D- defines the bus state.
Bus states and signal levels (full speed, 3.3 V logic)
| State | D+ | D- | Meaning |
|---|---|---|---|
| Differential 1 (J state) | High (> 2.8 V) | Low (< 0.3 V) | Idle, and data bit "J" |
| Differential 0 (K state) | Low (< 0.3 V) | High (> 2.8 V) | Data bit "K", resume signalling |
| Single-ended zero (SE0) | Low (< 0.8 V) | Low (< 0.8 V) | End of packet (2 bit times), reset (> 10 ms), disconnect |
| Single-ended one (SE1) | High | High | Illegal state |
| Idle | J state | Bus idle between packets | |
| Resume | K state for at least 20 ms | Wake-up from suspend | |
| Reset | SE0 for at least 10 ms | Device returns to default state |
For low-speed devices the polarity is reversed: J has D- high and D+ low, K is the opposite.
Speed detection
A full-speed device has a 1.5 kohm pull-up on D+ to 3.3 V, and a low-speed device on D-. The host has 15 kohm pull-down resistors on both lines. When a device is attached, the line with the pull-up goes high, giving the J state, and the host detects connect and the speed. Disconnect is recognised as SE0 (both pull-downs) for more than 2.5 us.
Packet signalling
Idle (J) -> SYNC (KJKJKJKK) -> packet -> EOP (SE0, SE0, J) -> Idle.
✓ Answer checked by Claude Sonnet 5.5
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