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PCI bus; 8255 printer interface at 5500H

Short answer

PCI is a high-speed local bus (32/64-bit, 33/66 MHz) with multiplexed address/data and plug-and-play. Base 5500H: port A=5500H (mode 1 output), B=5501H (mode 0 output), C=5502H, control=5503H. Control word A9H; enable interrupt with 0DH. Mode 1 output timing: WR' loads data, OBF' low, ACK' high triggers INTR.

Explain briefly about PCI bus. The base address for the interfacing circuit given below is 5500 H: (a) Identify the Port address (b) Write the necessary control words to initialize the 8255 (c) Draw the timing diagram for the configuration as shown in figure below. [Figure: an 82C55A PPI interfaced to a high speed printer. Port A (PA0-PA7) carries 8 data lines to the printer. Port C lines PC7 to PC4 carry handshake/control signals to the printer: DATA READY, ACK, PAPER FEED, FORWARD/REV. Port B (PB0-PB7) drives hammer relays and printer controls: PAPER FEED, FORWARD/REV, RIBBON, CARRIAGE SEN. PC1 and PC2 carry DATA READY and ACK handshake with the control logic and drivers; PC3 and PC0 carry INTERRUPT REQUEST lines.]

PCI bus

PCI (Peripheral Component Interconnect) is a 32/64-bit local bus at 33/66 MHz giving 132-528 MB/s. It has multiplexed address/data lines, bus mastering with burst transfers, plug-and-play configuration, processor independence through a host bridge, and replaced ISA in PCs.

Interpretation of the figure

Port A (PA0-PA7) sends data to the printer in mode 1 output; handshake: OBF_A' = DATA READY, ACK_A' = ACK from the printer, INTR_A = interrupt request. Port B in mode 0 output controls paper feed, forward/reverse, ribbon and hammers. PC4/PC5 and PC0-PC2 are used as inputs for printer sensing (carriage sense etc.).

(a) Port addresses (base 5500H, memory mapped, A1 A0 select)

Port A = 5500H, Port B = 5501H, Port C = 5502H, Control = 5503H.

(b) Control words

D7 = 1; port A mode 1 (D6D5 = 01), output (D4 = 0); PC4, PC5 input (D3 = 1); port B mode 0 (D2 = 0), output (D1 = 0); PC0-PC2 input (D0 = 1): 1010 1001 = A9H. Enable the printer interrupt (INTE_A = PC6): BSR 0000 1101 = 0DH.

        MVI A,A9H
        STA 5503H
        MVI A,0DH
        STA 5503H

(c) Timing diagram (mode 1 output)

 WR'     ---\___/-------------------------
 PA0-7   ------< data valid >-------------
 OBF'    -------\_______________/---------   (DATA READY to printer)
 ACK'    --------------\_____/-------------   (printer accepted)
 INTR    ______________________/--------\__

CPU writes data (WR' rising edge) -> OBF' goes low = DATA READY. Printer reads data and sends ACK' low. ACK' returning high sets OBF' high and INTR high (if INTE_A = 1), telling the CPU to send the next character.

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