Address decoding for 8 LEDs output port

Assumptions: 8085 system with I/O-mapped I/O (an 8086 system is the same, with M/IO' = 0). Port address ABH = 1010 1011 B, decoded uniquely using all 8 address lines A7–A0. An 8-bit latch 74LS374 (octal D flip-flop; a 74LS373 transparent latch can also be used) holds the data, and 8 LEDs with current-limiting resistors are connected to its outputs.

Decoding logic

• A7 A6 A5 A4 A3 A2 A1 A0 = 1 0 1 0 1 0 1 1.
• Lines that must be 0 (A6, A4, A2) pass through inverters; an 8-input NAND gives SEL' = 0 only for address ABH.
• The write pulse IOW' = WR' OR (NOT IO/M') is formed. IO/M' is 1 for I/O, so it is inverted first; IOW' is then low only for an I/O write.
• The latch is enabled when both are active. With a positive-edge latch (74LS374) the clock is CLK = SEL' OR IOW'; the data is latched when IOW' returns high. With a transparent latch (74LS373), G = SEL AND IOW (active high).

 A7 ---------------------------+
 A6 --o>o---------------------+|
 A5 ---------------------------+|
 A4 --o>o---------------------+ |--[8-input NAND]--SEL'--+
 A3 ---------------------------+|                        |
 A2 --o>o---------------------+ |                        [OR]-> CLK
 A1 ---------------------------+|                        |
 A0 ---------------------------+                  IOW' --+
                                                   (WR' + NOT IO/M')
 D0-D7 ---------> [74LS374 latch] -> Q0-Q7 -> 330 ohm -> LED -> GND
                  (OE' = 0)

An LED turns ON for logic 1 (use a driver such as 74LS244/ULN2803 if the latch cannot supply the LED current directly).

Address check

Only the address ABH makes all NAND inputs 1, so SEL' = 0 for ABH alone (unique decoding).

Program to turn on all LEDs / alternate LEDs

        MVI  A,0FFH       ; all LEDs ON
        OUT  0ABH         ; send to port ABH
        MVI  A,55H        ; alternate LEDs ON
        OUT  0ABH
        HLT

8086 version: MOV AL,0FFH then OUT 0ABH,AL.