Address decoding with PROM decoder

Address decoding is the process of using the higher-order address lines (and control signals) to generate the chip-select signal of a memory or I/O device, so that only one device is active for a given address. The lower-order lines go directly to the device to select a location inside it.

PROM as a decoder

A PROM (programmable read-only memory) can be used as a programmable decoder. The address lines to be decoded are connected to the PROM's address inputs, and its data outputs are the chip-select signals (active low). The PROM contents are programmed so that, for each input combination, only the required output is 0.

Advantages: any memory map, even one with irregular blocks, can be implemented by programming; it needs fewer chips than logic built from gates or a 74LS138; the map can be changed by reprogramming; and it is fast.

Example

8085 system with four 8K devices: ROM1 (0000–1FFFH), ROM2 (2000–3FFFH), RAM1 (4000–5FFFH), RAM2 (6000–7FFFH). A15, A14, A13 go to PROM address inputs A2, A1, A0; outputs O0–O3 (active low) go to the CS' of the four chips. A12–A0 go to the chips directly.

 A15 A14 A13 | O3 O2 O1 O0 | Selected
 0   0   0   | 1  1  1  0  | ROM1  0000-1FFF
 0   0   1   | 1  1  0  1  | ROM2  2000-3FFF
 0   1   0   | 1  0  1  1  | RAM1  4000-5FFF
 0   1   1   | 0  1  1  1  | RAM2  6000-7FFF
 1   x   x   | 1  1  1  1  | none  8000-FFFF

 A15 -->[A2        O0]--> CS' ROM1
 A14 -->[A1  PROM  O1]--> CS' ROM2
 A13 -->[A0        O2]--> CS' RAM1
                   O3 --> CS' RAM2

For address 4A00H: A15A14A13 = 010, so O2 = 0 and only RAM1 is selected. The stored data (E, D, B, 7 in hex for the low nibble, and F for the unused rows) is written into the PROM once, when it is programmed.