- 2070 Asar · 4+4 marks
8255 at A0A0H: interface and control words
Short answer
Addresses: A=A0A0H, B=A0A1H, C=A0A2H, control=A0A3H. Control words: (a) 82H (mode 0: A out, B in, C out); (b) A6H (mode 1: A out, B in, PC4,5 out); (c) C4H (mode 2: A, B mode 1 out); (d) 0BH (BSR set PC5).
The addresses captured by 8255 PPI are A0A0H to A0A3H. Sketch the interfacing circuit with 8085 microprocessor in memory mapped I/O for same. What will be the control words for following configurations of 8255 PPI? (a) Port A: Mode 0 output, Port B: Mode 0 input, Port C: Mode 0 output. (b) Port A: Mode 1 output, Port B: Mode 1 input, PC4,5: output. (c) Port A: Mode 2, Port B: Mode 1 output. (d) Set PC5 in BSR mode.
Interfacing circuit (8085, memory mapped)
A0A0H = 1010 0000 1010 0000, so A15-A2 = 1010 0000 1010 00. A1 and A0 go to the 8255 A1 and A0. Lines that must be 1 (A15, A13, A7, A5) are connected directly, and lines that must be 0 (A14, A12, A11, A10, A9, A8, A6, A4, A3, A2) go through inverters.
A15, A13, A7, A5 -----------------------------+
A14, A12, A11, A10, A9, A8, A6, A4, A3, A2 |
(each through a NOT gate) ------------------+--[ 15-input NAND ]--> CS' (low when selected)
IO/M --[NOT]----------------------------------+ (memory cycle)
A1 -> A1, A0 -> A0 RD' -> RD' WR' -> WR'
AD0-AD7 -> D0-D7 RESET OUT -> RESET
In practice two 74LS138 decoders or 74LS30/74LS260 gates are used to build the wide condition. Ports: A = A0A0H, B = A0A1H, C = A0A2H, control = A0A3H.
Control words
| Case | Bits (D7..D0) | Control word |
|---|---|---|
| (a) A mode 0 out, B mode 0 in, C mode 0 out | 1 00 0 0 0 1 0 | 82H |
| (b) A mode 1 out, B mode 1 in, PC4,5 output | 1 01 0 0 1 1 0 | A6H |
| (c) A mode 2, B mode 1 output | 1 1x x x 1 0 x | C4H (x = 0) |
| (d) Set PC5 (BSR) | 0 xxx 101 1 | 0BH |
Explanation: D7 = 1 selects mode set; D6 D5 give the group A mode; D4 = port A direction (1 = input); D3 = port C upper direction; D2 = group B mode; D1 = port B direction; D0 = port C lower direction. In (b), PC6 and PC7 (ACK_A', OBF_A') and PC0-PC2 (port B mode 1 signals) are used by the handshake and PC3 is INTR_A; D3 = 0 makes the free pins PC4 and PC5 outputs. In (c), mode 2 ignores D4 and D3. For BSR, D7 = 0, D3-D1 = bit number (101 = 5), and D0 = 1 for set.
✓ Answer checked by Claude Sonnet 5.5
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