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PC based concrete purifying factory with 8255

Short answer

Base address 4000H in memory-mapped I/O; ports A and B are inputs, port C output, mode 0. Port addresses: A=4000H, B=4001H, C=4002H, control=4003H. Control word 92H. Program reads ten sets from ports A and B, adds them, and stores 16-bit results starting at 4040H.

Assume that your group has decided to make a PC based instrumentation control system for automatic concrete purifying factory using an 8255 PPI card at base address 4000H in memory mapped I/O mode for controlling purpose. (a) List out the collected documents and components. (b) List out the different signals you need to derive and or can be connected directly to your interfacing circuit. (c) Draw minimum mapping circuits for the above system. (d) What are the addresses captured by your card? Generate the control word for the system. (e) Write a program module to read ten set of raw data from port A and port B; add the data and store the result starting from address 4040H.

Assumptions

8085 system, 8255 memory mapped at base 4000H. Sensors: pressure/level/moisture transducers through signal conditioning and an 8-bit ADC (two channels read by port A and port B). Outputs go through port C to valves and motors. RAM is available at 4040H onwards.

(a) Documents and components

  • Documents: datasheets of 8085, 8255, ADC, sensors, decoder gates; plant specification; block and circuit diagrams; address map; flowchart; program listing; test and calibration sheets.
  • Components: 8085 CPU, 74LS373, 8255A, ADC0808/0804 (two), sensors with op-amp conditioner, ROM, RAM, 74LS30/74LS04 gates or 74LS138 decoder, opto-isolators, relay drivers, relays/valves/motors, crystal, reset circuit, power supply.

(b) Signals

  • Directly connected: D0-D7 (AD0-AD7), RD', WR', RESET OUT -> RESET.
  • Derived: A0, A1 (latched low address) to 8255 A0, A1; CS' from decoding A15-A2 with IO/M (memory cycle); ALE for 74LS373; ADC start and EOC through port C.

(c) Minimum mapping circuit

4000H = 0100 0000 0000 0000: only A14 is 1, so A14 is connected directly and all other lines must be 0.

 A15, A13..A2 --[NOR]--+   (output 1 only if all these lines are 0)
 A14 ------------------+--[AND]--[NOT]--> CS' (low for 4000H-4003H)
 IO/M --[NOT]----------+   (IO/M = 0 in a memory cycle)
 8255: D0-D7, RD', WR', A0, A1, RESET

(d) Addresses and control word

Port A = 4000H, Port B = 4001H, Port C = 4002H, Control = 4003H. Port A input, port B input, port C upper and lower output, mode 0: D7=1, D6D5=00, D4=1, D3=0, D2=0, D1=1, D0=0 = 1001 0010 = 92H.

(e) Program: read ten sets, add A and B, store from 4040H

        MVI A,92H
        STA 4003H       ; initialise 8255
        LXI H,4040H     ; result pointer
        MVI C,0AH       ; ten sets
NEXT:   LDA 4000H       ; read port A
        MOV B,A
        LDA 4001H       ; read port B
        ADD B           ; A = A + B
        MOV M,A         ; store low byte
        INX H
        MVI A,00H
        ACI 00H         ; carry into A
        MOV M,A         ; store carry byte (16-bit result)
        INX H
        DCR C
        JNZ NEXT
        HLT

Each sum is stored as two bytes (sum, carry), so the ten results occupy 4040H-4053H.

✓ Answer checked by Claude Sonnet 5.5

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