Compose 2K x 16 ROM using 1K x 4

Given: base module 1K x 4 ROM; required: 2K x 16 ROM. Number of modules = (depth ratio) x (width ratio) = 2 x 4 = 8.

Method

• Width: the required word is 16 bits and each module gives 4 bits, so 4 modules are placed side by side (same address and enable); their data outputs are combined to form the full word.
• Depth: twice as many words are needed, so 2 rows of modules are used. The extra high-order address line A10 goes to a 1-to-2 decoder whose outputs enable one row at a time. The low-order 10 address lines (A9..A0) go to every module in parallel. The rows share the same data lines (tri-state outputs).
• Total address lines = 10 + 1 = 11; total data lines = 16.

Block diagram

 Address bits: 11 lines
   A10 --> [1-to-2 decoder] --> row enables E0, E1
   A9..A0 --> to every module (parallel)

 row 0: [M00] [M01] [M02] [M03]  <- E0
 row 1: [M10] [M11] [M12] [M13]  <- E1

 Data: M*0: D3..D0, M*1: D7..D4, M*2: D11..D8, M*3: D15..D12

Address ranges (row selected by the high bit)

Each row holds four 1K x 4 ROMs, which together supply D15..D0.