Two categories of semi-custom IC

In semi-custom (ASIC) technology the chip is built from pre-designed logic cells or pre-fabricated transistors, and only the connections (and some layers) are designed for the customer. The two categories are:

1. Gate array (array-based)

• The manufacturer makes wafers with an array of unconnected transistors/gates (the base array) in advance.
• The customer design only needs the metal interconnect layers (and contacts), so only a few masks are made.
• Short turnaround and low NRE, but lower density and speed because the cells are fixed and routing must go around them.

2. Standard cell (cell-based)

• The designer uses a library of pre-designed, pre-tested cells (gates, flip-flops, multiplexers) of equal height, placed in rows with routing channels between them.
• All mask layers are custom, so the layout is more efficient than a gate array's: smaller area, higher speed and lower power.
• Higher NRE and longer design time than gate arrays, but cheaper than full custom.