Use of VHDL; decoder design

Use of VHDL in embedded systems

VHDL (VHSIC Hardware Description Language) describes the structure and behaviour of digital hardware as text. In embedded systems it is used to:

• design custom single-purpose processors and peripherals (UART, timer, PWM, display controller) to run in parallel with the CPU;
• program FPGAs/CPLDs, or generate the layout of ASICs after synthesis;
• simulate and test the design before building hardware (test benches);
• reuse, document and port designs between devices and vendors;
• build hardware/software co-designs (soft-core processors with custom accelerators).

3-to-8 decoder

A decoder with enable has 3 input lines a(2:0) and 8 outputs y(7:0); when en = 1 exactly one output, selected by the binary value of a, is high.

library ieee;
use ieee.std_logic_1164.all;

entity decoder3to8 is
  port (
    en  : in  std_logic;                      -- enable
    a   : in  std_logic_vector(2 downto 0);   -- binary input
    y   : out std_logic_vector(7 downto 0)    -- one-hot output
  );
end entity decoder3to8;

architecture behavioral of decoder3to8 is
begin
  process (en, a)
  begin
    y <= (others => '0');                     -- default: all outputs low
    if en = '1' then
      case a is
        when "000"  => y <= "00000001";
        when "001"  => y <= "00000010";
        when "010"  => y <= "00000100";
        when "011"  => y <= "00001000";
        when "100"  => y <= "00010000";
        when "101"  => y <= "00100000";
        when "110"  => y <= "01000000";
        when "111"  => y <= "10000000";
        when others => y <= (others => '0');
      end case;
    end if;
  end process;
end architecture behavioral;

The code was analysed and simulated with GHDL; for all 8 input values the correct one-hot output appears, and with en = 0 all outputs are 0.