- 2070 Chaitra · 8 marks
Centre-tapped cycloconverter, one-third frequency
Short answer
A centre-tapped cycloconverter uses four thyristors P1, P2, N1, N2. For fo = fi/3, each output half-cycle uses three input half-cycles: P1, P2, P1 for positive output, then N1, N2, N1 for negative output, repeating every six input half-cycles.
Draw the circuit of a single phase cycloconverter using a center tapped transformer; Prepare a table showing the conduction pattern of thyristors and current paths for an output frequency of one-third the input frequency.
A single-phase cycloconverter with a centre-tapped transformer uses four thyristors: P1, P2 (positive group) and N1, N2 (negative group). For one-third frequency (, e.g. 50 Hz to 16.67 Hz), each output half cycle is built from three input half cycles.
Circuit
a o----+---P1->|---+
| +---|<-N1---+
~ vs Tr| |
O o----[ R ]-----+ K
| |
b o----+---P2->|---+
+---|<-N2---+
vo = v_KO; positive when current flows K -> O
- positive = positive supply half cycle (then is negative w.r.t. O).
- P1 conducts when is positive; P2 when is positive.
- N1 conducts when is negative; N2 when is negative.
Conduction pattern and current paths (, R load)
| Input half cycle | Supply | SCR ON | Current path | |
|---|---|---|---|---|
| 1 | + ( +) | P1 | a → P1 → K → R → O | + |
| 2 | − ( +) | P2 | b → P2 → K → R → O | + |
| 3 | + ( +) | P1 | a → P1 → K → R → O | + |
| 4 | − ( −) | N1 | O → R → K → N1 → a | − |
| 5 | + ( −) | N2 | O → R → K → N2 → b | − |
| 6 | − ( −) | N1 | O → R → K → N1 → a | − |
The pattern repeats every 6 input half cycles (3 input cycles = 1 output cycle).
Waveforms
vs /\ /\ /\
/ \ / \ / \
--/----\/----\/----\/----\/----\/--
1 2 3 4 5 6 (halves)
vo /\ /\ /\
/ \/ \/ \
--/------------\------------/--
\ /\ /\ /
\/ \/ \/
P1 P2 P1 N1 N2 N1
|<----- To = 3 Ti ----->|
Remarks
- Each SCR turns off naturally at the supply zero because the load is resistive.
- The output frequency is and, with firing angle , the rms output is , where is the rms voltage of each half winding.
- For an inductive load, longer gate pulses and a dead time at changeover between P and N groups are required.
✓ Answer checked by Claude Opus 5.5 (high effort)
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