Thyristor V-I, holding/latching; vertical BJT

A thyristor (SCR) is a four-layer P-N-P-N, three-junction ($J_1, J_2, J_3$) semiconductor switch with three terminals: anode (A), cathode (K) and gate (G). It can be turned ON by a small gate pulse when forward biased, but once ON the gate loses control; it turns OFF only when its anode current falls below the holding current.

V-I characteristic

              IA
               ^
               |  |<- ON state (VT = 1-2 V)
               |  |
         IL ---|--|
         IH ---|--+.
               |    `.   Ig2 > Ig1 > Ig=0
               |      `-.___      ___
     -VBR      |            `----'   |
  -----+-------+---------------------+--> VAK
       |       |  forward blocking  VBO
       |       |  (leakage current)
       | reverse blocking
       | (leakage current)
       v reverse avalanche

1. Reverse blocking mode: cathode is positive with respect to anode. Junctions $J_1$ and $J_3$ are reverse biased and $J_2$ is forward biased, so only a small reverse leakage current flows. If the reverse voltage reaches the reverse breakdown voltage $V_{BR}$, avalanche breakdown occurs at $J_1$ and $J_3$; the current rises sharply and the device is usually destroyed.
2. Forward blocking mode: anode is positive and gate is open. $J_1$ and $J_3$ are forward biased but $J_2$ is reverse biased, so only a small forward leakage current flows. The SCR is OFF and blocks the forward voltage.
3. Forward conduction (ON) mode: if the forward voltage is raised to the forward breakover voltage $V_{BO}$ (with $I_g = 0$), junction $J_2$ breaks down by avalanche and the SCR switches suddenly to the ON state (the negative-resistance jump). The voltage across it drops to about 1 to 2 V and the current is limited only by the load. With gate current, $J_2$ breaks down at a lower voltage: the larger $I_g$, the smaller the breakover voltage ($I_{g2} > I_{g1}$). In practice the SCR is always turned ON by a gate pulse at a voltage well below $V_{BO}$.

Holding and latching current

• Latching current ($I_L$): the minimum anode current that must flow through the SCR immediately after it is triggered, while the gate pulse is still present, so that it stays ON after the gate pulse is removed. If the anode current has not reached $I_L$ when the gate pulse ends, the SCR turns OFF again.
• Holding current ($I_H$): the minimum anode current that must keep flowing to hold an already conducting SCR in the ON state (gate open). If the anode current falls below $I_H$, the SCR turns OFF and returns to forward blocking.
• $I_L$ is greater than $I_H$, usually $I_L \approx 2$ to $3\,I_H$. Example: for an SCR with $I_L = 40$ mA and $I_H = 15$ mA, the gate pulse must last until the anode current reaches 40 mA, but once ON it stays ON until the current drops below 15 mA.

Why a vertical structure is used in power BJTs

      E        B        E
   ===[n+]=====[p]=====[n+]===
   ---------- p base ----------
   ------- n- drift region ----   (thick, lightly doped)
   ------- n+ substrate -------
              |
              C (bottom)

1. Large current area: current flows vertically through the whole chip area, so the cross-section is large and the current density and on-state resistance are low.
2. High voltage: the thick, lightly doped $n^-$ drift layer sits between base and collector and supports a high blocking voltage without making the chip large.
3. Better heat removal: the collector is the whole bottom of the chip, mounted on the heat sink.
4. Interdigitated emitter and base fingers on top reduce current crowding.