FET amplifier design flow and conditional stability

Flow diagram for FET amplifier design

 +------------------------------+
 | Specs: f, gain, Z0, BW, NF   |
 +------------------------------+
               |
 +------------------------------+
 | Choose transistor, bias;     |
 | get [S] at design frequency  |
 +------------------------------+
               |
 +------------------------------+
 | Compute Δ, K (and μ)         |
 +------------------------------+
               |
      K>1 and |Δ|<1 ?
     yes |          | no
         v          v
 Uncond. stable   Draw stability circles;
         |        pick Γs, ΓL in stable
         |        region (or stabilise)
         +----+-----+
              |
   Unilateral? (U small, S12≈0)
   yes: Γs=S11*, ΓL=S22*
   no : Γs=ΓMS, ΓL=ΓML (bilateral)
              |
 +------------------------------+
 | Compute GS, G0, GL -> GT     |
 +------------------------------+
              |
 +------------------------------+
 | Design input/output matching |
 | (stubs or L-C) on Smith chart|
 +------------------------------+
              |
 | Bias network, layout, simulate
              |
   Specs met? -- no --> revise
              | yes
            Build & test

Notes: the FET is biased (e.g. VDS, IDS from the datasheet) before reading [S]; matching networks transform 50 Ω to the required Γs and ΓL; RF chokes and DC blocks isolate bias from RF.

Conditional stability

An amplifier is conditionally (potentially) stable if |Γin| > 1 or |Γout| > 1 for some passive source or load. It happens when K < 1 (or |Δ| > 1). Then only certain Γs and ΓL are allowed, and these are found with stability circles.

Self-defined example

Assume a GaAs FET with S11 = 0.894∠−60.6°, S12 = 0.020∠62.4°, S21 = 3.122∠123.6°, S22 = 0.781∠−27.6°.

Δ = 0.6964∠−83.07°,   K = 0.607 < 1
→ conditionally stable
Output (load) circle:  CL = 1.363∠46.69°,  RL = 0.500
Input (source) circle: CS = 1.132∠68.46°,  RS = 0.199

Using the Smith chart

1. Plot CL with radius RL on the ΓL plane and CS with radius RS on the Γs plane.
2. Test the centre: for ΓL = 0, |Γin| = |S11| = 0.894 < 1, and for Γs = 0, |Γout| = |S22| = 0.781 < 1, so the centre is stable in both planes. The centre is outside both circles, so the stable region is outside the circles.
3. The parts of the circles that fall inside the unit chart (near the top-right, inductive high-|Γ| region) are the unstable regions; Γs and ΓL must not be placed there.

             .-----------.
           /          (###)    ### = unstable
          |   o        (##)      region (inside
          | centre             circle and chart)
          | stable           |
           \               /
             '-----------'

4. Select Γs, ΓL in the stable region with some margin and check |Γin| < 1 and |Γout| < 1. For Γs = S11*, ΓL = S22*: |Γin| = 0.912, |Γout| = 0.848, so this choice is stable and gives GTU,max = 20.95 dB (unilateral estimate; the actual GT is 20.06 dB).
5. If the desired point is unstable, add resistive loading (series/shunt resistor at input or output) or feedback to make the FET stable.