- 2081 Chaitra · 2+3+3 marks
Clos network and STS/TST blocking
Short answer
Cls network is a three-stage switch: N inputs divided into N/n first-stage n×k arrays, k middle (N/n)×(N/n) arrays, N/n third-stage k×n arrays; strictly non-blocking if k = 2n-1. Blocking probability: STS: P_B = [1 - (1 - p/beta)^2]^k, beta = k/N; TST: P_B = [1 - (1 - p/alpha)^2]^l, alpha = l/c. TST blocking is far lower because l >> k.
Define what the Clos network is. Derive the expression for blocking probability of both STS and TST switches, and compare them.
Clos network
A Clos network is a three-stage (multi-stage) switching network, proposed by Charles Clos (1953), in which inputs are divided into first-stage arrays of size , connected to middle arrays of size , which connect to third-stage arrays of size . Every array of one stage has exactly one link to every array of the next stage.
Clos showed that the network is strictly non-blocking when (worst case: other inputs of the calling array and outputs of the called array use different middle arrays, so one more is needed). With the best choice , the minimum is , much less than .
Blocking probability of STS
STS: S (N x k) -> T (k TSI modules) -> S (k x N)
Lee graph: k parallel paths, each = 2 links in series
In STS, a call from input highway A to output highway B in given slots can go through any of the time-switch modules. Each path uses a link from the first space stage to a module and a link from the module to the second space stage. With link occupancy ( space expansion):
- Probability a link is free ; both links of a path free .
- Path blocked ; all paths blocked:
Blocking probability of TST
TST: T (c -> l slots) -> S (N x N) -> T (l -> c)
Lee graph: l parallel paths (internal time slots)
In TST, the path from A to B passes through the space stage in any of the internal time slots. Each path uses one internal slot on A's highway and the same slot on B's highway. With time expansion , , and by the same argument:
Comparison
Since the number of paths in TST equals the number of internal time slots (32 to several hundred), while in STS it equals the number of time-switch modules (usually small), TST blocking is far lower for the same hardware. Example with :
| Point | STS | TST |
|---|---|---|
| Number of alternative paths | (time modules) | (internal slots) |
| Blocking | Higher | Much lower |
| Expansion by | More space arrays/modules | More internal slots (cheap memory) |
| Cost for large exchange | Higher | Lower (time stages cheap) |
| Control | Simpler for small sizes | More memory, path search over slots |
| Use | Small exchanges | Most large digital exchanges |
✓ Answer checked by Claude Opus 5.5 (high effort)
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