Why does Y = D3 + D1 D2' include D2' in the second term?

D1 only counts when the higher input D2 is 0

Because D0 is the highest priority

What is the purpose of the valid bit V = D0 + D1 + D2 + D3?

It shows whether at least one input is active, so XY is meaningful

It gives the code of the lowest input

It resolves two inputs being active

2079 Baisakh · 6 marks

4:2 priority encoder

Short answer

4:2 priority encoder (D3 highest). X = D2 + D3, Y = D3 + D1·D2', Valid V = D0+D1+D2+D3. Circuit: OR gate for X, NOT and AND for Y's product term then OR with D3, and 4-input OR for V.

Design the logic circuit for 4:2 Priority Encoder.

A 4:2 priority encoder has four inputs $D_0$ – $D_3$ and gives the 2-bit code $XY$ of the highest-priority active input. Here $D_3$ has the highest priority and $D_0$ the lowest. A valid bit $V$ shows that at least one input is 1 (otherwise $XY$ is meaningless).

Truth table (X = don't care)

$D_3$	$D_2$	$D_1$	$D_0$	X	Y	V
0	0	0	0	X	X	0
0	0	0	1	0	0	1
0	0	1	X	0	1	1
0	1	X	X	1	0	1
1	X	X	X	1	1	1

K-maps (rows $D_3D_2$ , columns $D_1D_0$ )

For X:

$D_3D_2$ \ $D_1D_0$	00	01	11	10
00	X	0	0	0
01	1	1	1	1
11	1	1	1	1
10	1	1	1	1

X = D_2 + D_3

For Y:

$D_3D_2$ \ $D_1D_0$	00	01	11	10
00	X	0	1	1
01	0	0	0	0
11	1	1	1	1
10	1	1	1	1

Y = D_3 + D_1 D_2'

Valid output:

V = D_0 + D_1 + D_2 + D_3

Logic circuit

 D3 ------+-----------------[OR]---- X
 D2 ---+--|-----------------^
       |  |
       +-[NOT]--+
 D1 ----------[AND]--+
                     +--[OR]------- Y
 D3 -----------------+

 D0,D1,D2,D3 -------[OR 4]--------- V

Check: $D_3D_2D_1D_0 = 0110$ : $X = 1$ , $Y = 0 + 1\cdot 0 = 0$ , so output $10$ = input 2, the highest active one. $D_3 = 1$ gives $XY = 11$ whatever the others are. All cases were verified against the table.

✓ Answer checked by Claude Opus 5.5 (high effort)

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4:2 priority encoder

Truth table (X = don't care)

K-maps (rows D3D2D_3D_2D3​D2​, columns D1D0D_1D_0D1​D0​)

Logic circuit

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K-maps (rows $D_3D_2$ , columns $D_1D_0$ )