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Priority encoder; 4-to-2 priority encoder logic

Short answer

A priority encoder outputs the code of the highest-priority active input with a valid bit V. For 4-to-2 (D3 highest): Y1=D3+D2, Y0=D3+D2' D1, V=D3+D2+D1+D0. Circuit uses OR, AND, NOT gates.

What is a priority encoder? Find out logic expressions and draw the logic circuit of 4 to 2 priority encoder.

A priority encoder is an encoder that gives the binary code of the highest-priority active input when more than one input is active at the same time. It also has a valid output VV that shows whether any input is active (an ordinary encoder gives a wrong code when two inputs are high).

4-to-2 priority encoder

Inputs D0D_0–D3D_3, with D3D_3 the highest priority. Outputs Y1Y0Y_1Y_0 and VV (X = don't care).

D3D_3D2D_2D1D_1D0D_0Y1Y_1Y0Y_0VV
0000XX0
0001001
001X011
01XX101
1XXX111

Expressions (from K-maps of the expanded table):

  • Y1=1Y_1 = 1 when D3=1D_3 = 1 or D2=1D_2 = 1:
Y1=D3+D2Y_1 = D_3 + D_2
  • Y0=1Y_0 = 1 when D3=1D_3 = 1, or when D1=1D_1 = 1 with D2=0D_2 = 0 (and D3=0D_3=0):
Y0=D3+D3′D2′D1=D3+D2′D1Y_0 = D_3 + D_3'D_2'D_1 = D_3 + D_2'D_1
  • VV is 1 if any input is 1:
V=D3+D2+D1+D0V = D_3 + D_2 + D_1 + D_0

Logic circuit

D3 -----------+---------> [OR] --> Y1
D2 ---+-------|---------> [  ]
      |       |
      +-[NOT]-|-+
              | [AND]-+
D1 -----------|-[   ] +-> [OR] --> Y0
              +---------> [  ]

D0,D1,D2,D3 ----------> [4-in OR] --> V

So the circuit needs one NOT, one 2-input AND, two 2-input OR gates and one 4-input OR gate. Example: D3D2D1D0=0110D_3D_2D_1D_0 = 0110 gives Y1Y0=10Y_1Y_0 = 10 because D2D_2 has higher priority than D1D_1.

✓ Answer checked by Claude Opus 5.5 (high effort)

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