- 2080 Baisakh · 2+4 marks
Priority encoder; 4-to-2 priority encoder logic
Short answer
A priority encoder outputs the code of the highest-priority active input with a valid bit V. For 4-to-2 (D3 highest): Y1=D3+D2, Y0=D3+D2' D1, V=D3+D2+D1+D0. Circuit uses OR, AND, NOT gates.
What is a priority encoder? Find out logic expressions and draw the logic circuit of 4 to 2 priority encoder.
A priority encoder is an encoder that gives the binary code of the highest-priority active input when more than one input is active at the same time. It also has a valid output that shows whether any input is active (an ordinary encoder gives a wrong code when two inputs are high).
4-to-2 priority encoder
Inputs –, with the highest priority. Outputs and (X = don't care).
| 0 | 0 | 0 | 0 | X | X | 0 |
| 0 | 0 | 0 | 1 | 0 | 0 | 1 |
| 0 | 0 | 1 | X | 0 | 1 | 1 |
| 0 | 1 | X | X | 1 | 0 | 1 |
| 1 | X | X | X | 1 | 1 | 1 |
Expressions (from K-maps of the expanded table):
- when or :
- when , or when with (and ):
- is 1 if any input is 1:
Logic circuit
D3 -----------+---------> [OR] --> Y1
D2 ---+-------|---------> [ ]
| |
+-[NOT]-|-+
| [AND]-+
D1 -----------|-[ ] +-> [OR] --> Y0
+---------> [ ]
D0,D1,D2,D3 ----------> [4-in OR] --> V
So the circuit needs one NOT, one 2-input AND, two 2-input OR gates and one 4-input OR gate. Example: gives because has higher priority than .
✓ Answer checked by Claude Opus 5.5 (high effort)
Related questions
- Priority encoder; "e" and "f" segments · Digital Logic, chapter 4
- 4:2 priority encoder · Digital Logic, chapter 4
- Priority encoder and octal priority encoder · Digital Logic, chapter 4 · asked 3×
- Octal priority encoder design · Digital Logic, chapter 4 · asked 3×
- K-map Σ(0,2,3,4,7,8,10,13)+d, logic circuit · Digital Logic, chapter 3
- Define combinational logic circuit · Digital Logic, chapter 3
- Preemptive priority and SRTF Gantt · Operating System, chapter 2