CC amplifier design, 20 V and 2 mA

A common collector (emitter follower) amplifier with voltage divider (firm) bias is designed so that the Q-point does not depend on β. The standard rules are: VE = VCC/2, divider current I2 ≥ 10 IB, and VB = VE + 0.7 V.

Given

VCC = 20 V, IC = 2 mA, β = 100.

Design

IB = IC/β = 2 mA/100 = 20 µA            IE = IC(1 + 1/β) = 2.02 mA
VE = VCC/2 = 10 V   (maximum symmetrical swing)
RE = VE/IE = 10/2.02 mA = 4.95 kΩ   → use 5 kΩ (VE ≈ 10.1 V)

VB = VE + VBE = 10.1 + 0.7 = 10.8 V
I2 = 10 IB = 0.2 mA  (firm biasing)
R2 = VB/I2 = 10.8/0.2 mA = 54 kΩ
R1 = (VCC - VB)/(I2 + IB) = 9.2/0.22 mA = 41.8 kΩ

Chosen values: R1 ≈ 42 kΩ, R2 ≈ 54 kΩ, RE = 5 kΩ (VCE = 20 - 10.1 = 9.9 V; the collector is tied directly to VCC). Coupling capacitors are added at the input and output.

β independence: since I2 = 10 IB, the base voltage is held nearly fixed, so IE = (VB - 0.7)/RE does not depend on β.

Small-signal analysis (no load)

re = VT/IE = 25 mV/2.02 mA = 12.4 Ω
Rin(base) = (β+1)(re + RE) = 101 × 5012 = 506 kΩ
R1 || R2 = 23.6 kΩ
Rin = R1 || R2 || Rin(base) = 23.6k || 506k = 22.6 kΩ

Voltage gain

Av = RE/(RE + re) = 5000/5012.4 = 0.9975 ≈ 1

Current gain

Ai = ie/ii = (β+1) × (R1||R2) / (R1||R2 + Rin(base)) = 101 × 23.6/(23.6 + 506) ≈ 4.5

(The current gain from the base is 101, but most of the input current goes into the bias divider, so the overall gain is 4.5.)

Answer: R1 = 42 kΩ, R2 = 54 kΩ, RE = 5 kΩ; Av ≈ 0.997; Rin ≈ 22.6 kΩ; Ai ≈ 4.5 (101 at the base).