Mirror error and active-load differential gain

Reasons IO ≠ IREF in a simple current mirror

In a simple two-transistor mirror the output current IO is not exactly IREF because:

1. Finite β (base current): IREF must supply IC1 plus both base currents: IREF = IC + 2IC/β, so IO = IREF/(1 + 2/β). For β = 100, IO is about 2% less than IREF.
2. Early effect (finite ro): VCE1 = VBE ≈ 0.7 V but VCE2 is set by the load and is usually larger. Because of base-width modulation, IO = IC1(1 + (VCE2 − VBE)/VA), so IO is slightly larger and changes with output voltage.
3. Mismatch: small differences in IS (emitter area, doping) and temperature between Q1 and Q2 make VBE1 = VBE2 give unequal currents.

Gain of differential amplifier: active load vs passive load

Consider a BJT differential pair Q1–Q2 with tail current I, gm = (I/2)/VT. A differential input vd = v1 − v2 gives each transistor ±vd/2, so

ic1 = +gm·vd/2 ,   ic2 = -gm·vd/2

Passive load (RC in each collector), single-ended output at Q2:

vo = -ic2·RC = gm·RC·vd/2
Ad(passive) = gm·RC/2

The signal current of Q1 is lost in its own RC.

Active load (PNP current mirror Q3–Q4):

      +VCC ---- Q3(diode) ==== Q4 ---- +VCC
                  |             |
                  | ic1         +----- vo
                  |             |
       v1 ---B   Q1            Q2   B--- v2
                  +------+------+
                         I
                       -VEE

Q3 carries ic1, and the mirror copies it into Q4, so Q4 pushes ic1 = +gm vd/2 into the output node while Q2 draws ic2 = −gm vd/2 from it:

io = ic1 - ic2 = gm·vd/2 + gm·vd/2 = gm·vd
vo = gm·vd·(ro2 ‖ ro4)
Ad(active) = gm·(ro2 ‖ ro4)

For the same load resistance R (ro2‖ro4 = RC = R):

Ad(active)/Ad(passive) = gm·R / (gm·R/2) = 2

So the active load doubles the gain, because both halves of the signal current reach the output. Since ro2‖ro4 is also much larger than a practical RC, the real gain is many times higher.