Short note: Current steering circuits

A current steering circuit generates one reference current on the chip and then copies ("steers") it to many points of the IC using current mirrors, so all stages are biased by constant current sources.

                 +VCC
        +---------+---------+
        |         |         |
    Q3 (diode)   Q4        Q5     PNP mirror:
        |         | I3      | I4  sources current
        |         v         v
        R       to load   to load
        |
        |       from load from load
        |         | I1      | I2
    Q1 (diode)   Q6        Q7     NPN mirror:
        |         |         |     sinks current
        +---------+---------+
                 -VEE
  (base of Q1 drives Q6, Q7; base of Q3 drives Q4, Q5)

Working:

1. Diode-connected transistors Q1 and Q3 in series with resistor R set IREF = (VCC + VEE − VBE1 − VEB3)/R (or (VCC − VBE)/R for a single mirror).
2. The VBE of Q1 is applied to the bases of several NPN transistors (Q6, Q7, …). Each copies IREF, so they sink current from the circuits connected to them.
3. The reference current also flows through a diode-connected PNP (Q3), whose VEB drives PNP transistors (Q4, Q5, …) that source current into loads.
4. Different output currents are obtained by scaling the emitter areas: I = IREF × (area of output transistor / area of reference transistor), e.g. a 2× area transistor gives 2IREF.

Advantages: only one resistor and one reference are needed; all bias currents track each other with temperature and supply; transistors are cheaper than resistors in IC area; high output resistance of current sources gives high gain and good CMRR.

Use: biasing of op-amp stages (e.g. the 741 uses one reference current for its input, gain and output stages).