- 2074 Bhadra · 3 marks
Hardware interrupts available in 8086
Short answer
The 8086 has two hardware interrupt pins: NMI (non-maskable, edge-triggered, fixed type 2) and INTR (maskable by IF, level-triggered, type supplied externally). NMI has higher priority; INTR uses two INTA cycles and can be expanded with an 8259A.
Discuss the different hardware interrupts available in 8086.
The 8086 has two hardware interrupt pins, NMI and INTR, and one acknowledgement output INTA'.
| Feature | NMI (pin 17) | INTR (pin 18) |
|---|---|---|
| Name | Non-maskable interrupt | Interrupt request |
| Trigger | Rising edge (must stay high for 2 clocks) | High level (sampled at end of instruction) |
| Maskable | No | Yes, by flag IF (CLI/STI) |
| Type number | Fixed, type 2 (vector at 00008H) | Supplied by external device/8259A on D7–D0 |
| INTA' cycles | Not generated | Two INTA' cycles |
| Priority | Higher | Lower |
| Use | Power failure, memory parity error | Ordinary I/O devices |
- When INTR is accepted, the 8086 pushes FLAGS, CS and IP, clears IF and TF, and gets the vector from the table at 4 × type.
- For many devices on one INTR pin, an 8259A programmable interrupt controller is used (up to 8 inputs, extendable by cascading).
- NMI is used for events that need immediate attention, while INTR handles normal devices under software control.
✓ Answer checked by Claude Opus 5.5 (high effort)
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