- 2071 Chaitra · 6 marks
General register organization in CPU
Short answer
A CPU register file connects to the ALU via two multiplexers (SELA, SELB) for operand selection and a decoder (SELD) for destination loading. A 14-bit control word (3+3+3+5 bits) specifies SELA, SELB, SELD, and OPR for one micro-operation per cycle. Additional registers include PC, IR, MAR, MBR, AC, PSW, stack pointer, and index registers. This organization reduces memory accesses, speeds execution, and shortens instructions.
Explain the general organization of registers in the CPU.
A CPU contains a set of registers to hold data and addresses, so that the ALU does not need to access memory for every operand. In the general register organization, a bank of registers is connected to the ALU through multiplexers and buses.
+-----------------------------+
Clock -->| R1 R2 R3 R4 R5 R6 R7 |<-- Load <-- [3x8 decoder] <-- SELD
+-----------------------------+
| (7 register outputs |
| + external input) |
SELA --> [ MUX A ] [ MUX B ] <-- SELB
| A bus | B bus
+------> [ ALU ] <----+
^ |
OPR ---+ +--> Output (fed back to the register inputs)
Parts
- Register file (R1–R7): general-purpose registers.
- Two multiplexers (MUX A and MUX B): select the source registers for the two ALU inputs. They are controlled by SELA and SELB.
- ALU: performs the operation chosen by the OPR field.
- Decoder (SELD): enables loading of the destination register that receives the result.
- Input / output: the external input can be selected by a multiplexer and loaded into a register; the ALU result can be sent out.
Control word
A 14-bit control word selects one micro-operation: SELA (3), SELB (3), SELD (3), OPR (5). For R1 ← R2 + R3: SELA = R2 (010), SELB = R3 (011), SELD = R1 (001), OPR = ADD (00010), so the control word is 010 011 001 00010. The operation completes in one clock cycle.
Other registers in a CPU
PC (next instruction address), IR (current instruction), AR/MAR, DR/MBR, AC, status flags (PSW), stack pointer and index registers.
Advantages: fewer memory accesses, faster programs, and shorter instructions because register addresses need only a few bits.
✓ Answer checked by Claude Opus 5.5 (high effort)
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