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DMA vs CPU memory request

Short answer

DMA gets higher priority because I/O devices cannot wait without data loss, while the CPU can be paused briefly. The DMA controller asserts bus request; the CPU finishes its current bus cycle, tristates its buses, and issues bus grant, allowing DMA to perform cycle stealing or burst transfers before returning control.

How does DMA have request priority over the CPU when both request a memory transfer?

The DMA controller is given higher priority on the memory bus than the CPU because an I/O device cannot wait: its data buffer would overflow or data would be lost if the transfer is delayed, whereas the CPU can simply be paused for a cycle without losing anything.

The DMA controller sends a bus request (BR) to the CPU. The CPU completes its current bus cycle, releases the address, data and control buses (high impedance), and sends bus grant (BG). The DMA controller then uses the memory for one word (cycle stealing) or a block (burst) and returns the bus to the CPU.

✓ Answer checked by Claude Opus 5.5 (high effort)

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