- 2076 Chaitra · 2+5 marks
Shift register uses; 4-bit ring counter
Short answer
A shift register stores and shifts binary data; uses include serial conversion, delay, and counters. A 4-bit ring counter circulates a single '1' by feeding QD back to DA, starting from 1000. It cycles 1000 → 0100 → 0010 → 0001 → 1000 (mod-4), providing self-decoded outputs with each line high for one clock period.
Define shift registers with its application. Explain the working principle of 4 bit Ring counter with its timing diagram.
Shift register and its applications
A shift register is a chain of flip-flops with a common clock that stores binary data and shifts it one position left or right at each clock pulse.
Applications:
- Temporary data storage (buffer registers).
- Serial-to-parallel and parallel-to-serial conversion (UART, serial communication).
- Time delay of serial data by n clock periods.
- Arithmetic: shift left/right to multiply or divide by 2.
- Ring counters and Johnson (twisted ring) counters, sequence generators.
4-bit ring counter
A ring counter is a shift register whose last output is connected back to the first input, so a single 1 circulates around the ring. A 4-bit ring counter has 4 states (mod-4, mod-n in general).
+-----------------------------------------+
| PRE CLR CLR CLR |
| +-----+ +-----+ +-----+ +-----+ |
+->|D QA|-->|D QB|-->|D QC|-->|D QD|--+
|> | |> | |> | |> |
+-----+ +-----+ +-----+ +-----+
CLK ---^---------^---------^---------^
Start pulse: PRESET A, CLEAR B, C, D -> 1000
Working principle
- A start pulse presets FF-A and clears FF-B, C, D, so QA QB QC QD = 1000.
- At each rising clock edge every bit moves one place right and QD goes back to QA ().
- The single 1 travels A to B to C to D and back to A, giving the sequence 1000, 0100, 0010, 0001, 1000, ...
- Exactly one output is high at a time, so no decoder is needed; each output is high for one clock period out of every four.
| CLK | QA | QB | QC | QD |
|---|---|---|---|---|
| 0 | 1 | 0 | 0 | 0 |
| 1 | 0 | 1 | 0 | 0 |
| 2 | 0 | 0 | 1 | 0 |
| 3 | 0 | 0 | 0 | 1 |
| 4 | 1 | 0 | 0 | 0 |
Timing diagram
1 2 3 4 5 6 7 8
CLK _|‾|_|‾|_|‾|_|‾|_|‾|_|‾|_|‾|_|‾|
QA ‾|___________|‾‾‾|___________|‾‾
QB _|‾‾‾|___________|‾‾‾|__________
QC _____|‾‾‾|___________|‾‾‾|______
QD _________|‾‾‾|___________|‾‾‾|__
The frequency at each output is . Ring counters are used as sequence (timing) generators and for controlling steps in sequential operations. The drawback is that n flip-flops give only n states.
✓ Answer checked by Claude Opus 5.5 (high effort)
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