Shift register uses; switched tail ring counter

Applications of shift registers

• Temporary data storage (buffer registers).
• Serial-to-parallel and parallel-to-serial conversion (UART, serial communication).
• Time delay of serial data by n clock periods.
• Arithmetic: shift left/right to multiply or divide by 2.
• Ring counters and Johnson (twisted ring) counters, sequence generators.

3-bit switched tail ring counter (Johnson counter)

A switched tail (twisted ring) counter, also called a Johnson counter, is a shift register whose complemented output of the last flip-flop is fed back to the input of the first. An n-flip-flop Johnson counter has 2n states, so 3 flip-flops give a mod-6 counter.

   +--------------------------------+
   |                          QC'   |
   |  +-----+   +-----+   +------+  |
   +->|D  QA|-->|D  QB|-->|D   QC|  |
      |>    |   |>    |   |>  QC'|--+
      +-----+   +-----+   +------+
         ^         ^         ^
 CLK ----+---------+---------+
 All FFs cleared to 000 at the start.

Working

1. All flip-flops are cleared: QA QB QC = 000. Then $D_A = \overline{Q_C} = 1$.
2. At each clock the data shifts right ($QB \leftarrow QA,\ QC \leftarrow QB$) and $QA \leftarrow \overline{Q_C}$.
3. 1s fill the register from the left (100, 110, 111); once QC = 1, 0s enter (011, 001, 000), and the cycle repeats after 6 clocks.

Each state is decoded by one 2-input AND gate (last column), which is simpler than decoding a binary counter.

Timing diagram

       1   2   3   4   5   6   7
CLK   _|‾|_|‾|_|‾|_|‾|_|‾|_|‾|_|‾|
QA    _|‾‾‾‾‾‾‾‾‾‾‾|___________|‾‾
QB    _____|‾‾‾‾‾‾‾‾‾‾‾|__________
QC    _________|‾‾‾‾‾‾‾‾‾‾‾|______

Each output is a square wave of frequency $f_{CLK}/6$, shifted by one clock from the previous one. If the counter enters an unused state (010 or 101) it cycles in a wrong loop, so extra correction logic or a proper reset is needed.